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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Crystal Guo <crystal.guo@mediatek.com>,
	robh+dt@kernel.org, matthias.bgg@gmail.com
Cc: srv_heupstream@mediatek.com, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	s-anna@ti.com, seiya.wang@mediatek.com, stanley.chu@mediatek.com,
	yingjoe.chen@mediatek.com, fan.chen@mediatek.com,
	yong.liang@mediatek.com
Subject: Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas
Date: Thu, 03 Dec 2020 08:41:06 +0100	[thread overview]
Message-ID: <230c34e8a973140ebb7f155f5527050408f0c438.camel@pengutronix.de> (raw)
In-Reply-To: <20200930022159.5559-2-crystal.guo@mediatek.com>

Hi,

On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote:
> Add a YAML documentation for Mediatek, which uses ti reset-controller
> driver directly. The TI reset controller provides a common reset
> management, and is suitable for Mediatek SoCs.
> 
> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
> ---
>  .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> 
> diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> new file mode 100644
> index 000000000000..7871550c3c69
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek Reset Controller
> +
> +maintainers:
> +  - Crystal Guo <crystal.guo@mediatek.com>
> +
> +description:
> +  The bindings describe the reset-controller for Mediatek SoCs,
> +  which is based on TI reset controller. For more detail, please
> +  visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.
> +
> +properties:
> +  compatible:
> +    const: mediatek,syscon-reset
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  mediatek,reset-bits:
> +    description: >
> +      Contains the reset control register information, please refer to
> +      Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.

I would really like some input from Rob on this, in v4 he asked not to
repeat 'ti,reset-bits'.

regards
Philipp

WARNING: multiple messages have this Message-ID (diff)
From: Philipp Zabel <p.zabel@pengutronix.de>
To: Crystal Guo <crystal.guo@mediatek.com>,
	robh+dt@kernel.org,  matthias.bgg@gmail.com
Cc: devicetree@vger.kernel.org, yong.liang@mediatek.com,
	stanley.chu@mediatek.com, srv_heupstream@mediatek.com,
	seiya.wang@mediatek.com, linux-kernel@vger.kernel.org,
	fan.chen@mediatek.com, linux-mediatek@lists.infradead.org,
	yingjoe.chen@mediatek.com, s-anna@ti.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas
Date: Thu, 03 Dec 2020 08:41:06 +0100	[thread overview]
Message-ID: <230c34e8a973140ebb7f155f5527050408f0c438.camel@pengutronix.de> (raw)
In-Reply-To: <20200930022159.5559-2-crystal.guo@mediatek.com>

Hi,

On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote:
> Add a YAML documentation for Mediatek, which uses ti reset-controller
> driver directly. The TI reset controller provides a common reset
> management, and is suitable for Mediatek SoCs.
> 
> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
> ---
>  .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> 
> diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> new file mode 100644
> index 000000000000..7871550c3c69
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek Reset Controller
> +
> +maintainers:
> +  - Crystal Guo <crystal.guo@mediatek.com>
> +
> +description:
> +  The bindings describe the reset-controller for Mediatek SoCs,
> +  which is based on TI reset controller. For more detail, please
> +  visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.
> +
> +properties:
> +  compatible:
> +    const: mediatek,syscon-reset
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  mediatek,reset-bits:
> +    description: >
> +      Contains the reset control register information, please refer to
> +      Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.

I would really like some input from Rob on this, in v4 he asked not to
repeat 'ti,reset-bits'.

regards
Philipp

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Philipp Zabel <p.zabel@pengutronix.de>
To: Crystal Guo <crystal.guo@mediatek.com>,
	robh+dt@kernel.org,  matthias.bgg@gmail.com
Cc: devicetree@vger.kernel.org, yong.liang@mediatek.com,
	stanley.chu@mediatek.com, srv_heupstream@mediatek.com,
	seiya.wang@mediatek.com, linux-kernel@vger.kernel.org,
	fan.chen@mediatek.com, linux-mediatek@lists.infradead.org,
	yingjoe.chen@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas
Date: Thu, 03 Dec 2020 08:41:06 +0100	[thread overview]
Message-ID: <230c34e8a973140ebb7f155f5527050408f0c438.camel@pengutronix.de> (raw)
In-Reply-To: <20200930022159.5559-2-crystal.guo@mediatek.com>

Hi,

On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote:
> Add a YAML documentation for Mediatek, which uses ti reset-controller
> driver directly. The TI reset controller provides a common reset
> management, and is suitable for Mediatek SoCs.
> 
> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
> ---
>  .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> 
> diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> new file mode 100644
> index 000000000000..7871550c3c69
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek Reset Controller
> +
> +maintainers:
> +  - Crystal Guo <crystal.guo@mediatek.com>
> +
> +description:
> +  The bindings describe the reset-controller for Mediatek SoCs,
> +  which is based on TI reset controller. For more detail, please
> +  visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.
> +
> +properties:
> +  compatible:
> +    const: mediatek,syscon-reset
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  mediatek,reset-bits:
> +    description: >
> +      Contains the reset control register information, please refer to
> +      Documentation/devicetree/bindings/reset/ti-syscon-reset.txt.

I would really like some input from Rob on this, in v4 he asked not to
repeat 'ti,reset-bits'.

regards
Philipp

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-12-03  7:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  2:21 [v6,0/3] introduce TI reset controller for MT8192 SoC Crystal Guo
2020-09-30  2:21 ` Crystal Guo
2020-09-30  2:21 ` Crystal Guo
2020-09-30  2:21 ` [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas Crystal Guo
2020-09-30  2:21   ` Crystal Guo
2020-09-30  2:21   ` Crystal Guo
2020-10-14 13:30   ` Crystal Guo
2020-10-14 13:30     ` Crystal Guo
2020-10-14 13:30     ` Crystal Guo
2020-11-11  8:28     ` Stanley Chu
2020-11-11  8:28       ` Stanley Chu
2020-11-11  8:28       ` Stanley Chu
2020-12-03  7:41   ` Philipp Zabel [this message]
2020-12-03  7:41     ` Philipp Zabel
2020-12-03  7:41     ` Philipp Zabel
2020-12-26  9:06     ` Crystal Guo
2020-12-26  9:06       ` Crystal Guo
2020-12-26  9:06       ` Crystal Guo
2020-09-30  2:21 ` [v6,2/3] reset-controller: ti: introduce a new reset handler Crystal Guo
2020-09-30  2:21   ` Crystal Guo
2020-09-30  2:21   ` Crystal Guo
2020-11-30 10:35   ` Ikjoon Jang
2020-11-30 10:35     ` Ikjoon Jang
2020-11-30 10:35     ` Ikjoon Jang
2020-12-04  2:34     ` Crystal Guo
2020-12-04  2:34       ` Crystal Guo
2020-12-04  2:34       ` Crystal Guo
2020-09-30  2:21 ` [v6,3/3] reset-controller: ti: force the write operation when assert or deassert Crystal Guo
2020-09-30  2:21   ` [v6, 3/3] " Crystal Guo
2020-09-30  2:21   ` Crystal Guo
2020-11-30 11:13   ` Ikjoon Jang
2020-11-30 11:13     ` Ikjoon Jang
2020-11-30 11:13     ` Ikjoon Jang
2020-12-02 11:06     ` Crystal Guo
2020-12-02 11:06       ` Crystal Guo
2020-12-02 11:06       ` Crystal Guo
2020-12-03  3:30       ` Ikjoon Jang
2020-12-03  3:30         ` Ikjoon Jang
2020-12-03  3:30         ` Ikjoon Jang
2020-12-03  7:45   ` [v6,3/3] " Philipp Zabel
2020-12-03  7:45     ` Philipp Zabel
2020-12-03  7:45     ` Philipp Zabel

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