From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> To: Stefan Wahren <stefan.wahren@i2se.com>, Nicolas Saenz Julienne <nsaenz@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Ray Jui <ray.jui@broadcom.com>, Scott Branden <scott.branden@broadcom.com>, Ulf Hansson <ulf.hansson@linaro.org>, Stefan Wahren <wahrenst@gmx.net>, Matthias Brugger <mbrugger@suse.com>, Adrian Hunter <adrian.hunter@intel.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com> Cc: f.fainelli@gmail.com, phil@raspberrypi.com, tim.gover@raspberrypi.com, alcooperx@gmail.com, linux-kernel@vger.kernel.org, robh@kernel.org Subject: Re: [PATCH 2/3] mmc: sdhci-iproc: Cap min clock frequency on BCM2711 Date: Wed, 07 Apr 2021 10:44:39 +0200 [thread overview] Message-ID: <25e9fc3bedd8f97dd151b1f36d752f032c6ec628.camel@suse.de> (raw) In-Reply-To: <2d40b062-5809-15ce-b9d1-651644ff6e22@i2se.com> [-- Attachment #1: Type: text/plain, Size: 2767 bytes --] On Tue, 2021-04-06 at 19:59 +0200, Stefan Wahren wrote: > Hi Nicolas, > > Am 06.04.21 um 12:48 schrieb Nicolas Saenz Julienne: > > There is a known bug on BCM2711's SDHCI core integration where the > > controller will hang when the difference between the core clock and the > > bus clock is too great. Specifically this can be reproduced under the > > following conditions: > > > > - No SD card plugged in, polling thread is running, probing cards at > > 100KHz. > > - BCM2711's core clock configured at 500MHz or more. > > > > So set 200MHz as the minimum clock frequency available for that board. > i think it should be 200 kHz? Of course... Sorry for that. Regards, Nicolas > > > > For more information on the issue see this: > > https://lore.kernel.org/linux-mmc/20210322185816.27582-1-nsaenz@kernel.org/T/#m11f2783a09b581da6b8a15f302625b43a6ecdeca > > > > Fixes: f84e411c85be ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711") > > Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org> > > --- > > drivers/mmc/host/sdhci-iproc.c | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c > > index ddeaf8e1f72f..1ef888e91f73 100644 > > --- a/drivers/mmc/host/sdhci-iproc.c > > +++ b/drivers/mmc/host/sdhci-iproc.c > > @@ -173,6 +173,23 @@ static unsigned int sdhci_iproc_get_max_clock(struct sdhci_host *host) > > return pltfm_host->clock; > > } > > > > > > +/* > > + * There is a known bug on BCM2711's SDHCI core integration where the > > + * controller will hang when the difference between the core clock and the bus > > + * clock is too great. Specifically this can be reproduced under the following > > + * conditions: > > + * > > + * - No SD card plugged in, polling thread is running, probing cards at > > + * 100KHz. > > + * - BCM2711's core clock configured at 500MHz or more > > + * > > + * So we set 200MHz as the minimum clock frequency available for that SoC. > > + */ > > +static unsigned int sdhci_iproc_bcm2711_get_min_clock(struct sdhci_host *host) > > +{ > > + return 200000; > > +} > > + > > static const struct sdhci_ops sdhci_iproc_ops = { > > .set_clock = sdhci_set_clock, > > .get_max_clock = sdhci_iproc_get_max_clock, > > @@ -271,6 +288,7 @@ static const struct sdhci_ops sdhci_iproc_bcm2711_ops = { > > .set_clock = sdhci_set_clock, > > .set_power = sdhci_set_power_and_bus_voltage, > > .get_max_clock = sdhci_iproc_get_max_clock, > > + .get_min_clock = sdhci_iproc_bcm2711_get_min_clock, > > .set_bus_width = sdhci_set_bus_width, > > .reset = sdhci_reset, > > .set_uhs_signaling = sdhci_set_uhs_signaling, [-- Attachment #2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 488 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> To: Stefan Wahren <stefan.wahren@i2se.com>, Nicolas Saenz Julienne <nsaenz@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Ray Jui <ray.jui@broadcom.com>, Scott Branden <scott.branden@broadcom.com>, Ulf Hansson <ulf.hansson@linaro.org>, Stefan Wahren <wahrenst@gmx.net>, Matthias Brugger <mbrugger@suse.com>, Adrian Hunter <adrian.hunter@intel.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com> Cc: f.fainelli@gmail.com, phil@raspberrypi.com, tim.gover@raspberrypi.com, alcooperx@gmail.com, linux-kernel@vger.kernel.org, robh@kernel.org Subject: Re: [PATCH 2/3] mmc: sdhci-iproc: Cap min clock frequency on BCM2711 Date: Wed, 07 Apr 2021 10:44:39 +0200 [thread overview] Message-ID: <25e9fc3bedd8f97dd151b1f36d752f032c6ec628.camel@suse.de> (raw) In-Reply-To: <2d40b062-5809-15ce-b9d1-651644ff6e22@i2se.com> [-- Attachment #1.1: Type: text/plain, Size: 2767 bytes --] On Tue, 2021-04-06 at 19:59 +0200, Stefan Wahren wrote: > Hi Nicolas, > > Am 06.04.21 um 12:48 schrieb Nicolas Saenz Julienne: > > There is a known bug on BCM2711's SDHCI core integration where the > > controller will hang when the difference between the core clock and the > > bus clock is too great. Specifically this can be reproduced under the > > following conditions: > > > > - No SD card plugged in, polling thread is running, probing cards at > > 100KHz. > > - BCM2711's core clock configured at 500MHz or more. > > > > So set 200MHz as the minimum clock frequency available for that board. > i think it should be 200 kHz? Of course... Sorry for that. Regards, Nicolas > > > > For more information on the issue see this: > > https://lore.kernel.org/linux-mmc/20210322185816.27582-1-nsaenz@kernel.org/T/#m11f2783a09b581da6b8a15f302625b43a6ecdeca > > > > Fixes: f84e411c85be ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711") > > Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org> > > --- > > drivers/mmc/host/sdhci-iproc.c | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c > > index ddeaf8e1f72f..1ef888e91f73 100644 > > --- a/drivers/mmc/host/sdhci-iproc.c > > +++ b/drivers/mmc/host/sdhci-iproc.c > > @@ -173,6 +173,23 @@ static unsigned int sdhci_iproc_get_max_clock(struct sdhci_host *host) > > return pltfm_host->clock; > > } > > > > > > +/* > > + * There is a known bug on BCM2711's SDHCI core integration where the > > + * controller will hang when the difference between the core clock and the bus > > + * clock is too great. Specifically this can be reproduced under the following > > + * conditions: > > + * > > + * - No SD card plugged in, polling thread is running, probing cards at > > + * 100KHz. > > + * - BCM2711's core clock configured at 500MHz or more > > + * > > + * So we set 200MHz as the minimum clock frequency available for that SoC. > > + */ > > +static unsigned int sdhci_iproc_bcm2711_get_min_clock(struct sdhci_host *host) > > +{ > > + return 200000; > > +} > > + > > static const struct sdhci_ops sdhci_iproc_ops = { > > .set_clock = sdhci_set_clock, > > .get_max_clock = sdhci_iproc_get_max_clock, > > @@ -271,6 +288,7 @@ static const struct sdhci_ops sdhci_iproc_bcm2711_ops = { > > .set_clock = sdhci_set_clock, > > .set_power = sdhci_set_power_and_bus_voltage, > > .get_max_clock = sdhci_iproc_get_max_clock, > > + .get_min_clock = sdhci_iproc_bcm2711_get_min_clock, > > .set_bus_width = sdhci_set_bus_width, > > .reset = sdhci_reset, > > .set_uhs_signaling = sdhci_set_uhs_signaling, [-- Attachment #1.2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-07 8:47 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-06 10:47 [PATCH 0/3] BCM2711 sdhci-iproc improvements Nicolas Saenz Julienne 2021-04-06 10:47 ` Nicolas Saenz Julienne 2021-04-06 10:48 ` [PATCH 1/3] dt-bindings: mmc: iproc-sdhci: Convert to json-schema Nicolas Saenz Julienne 2021-04-06 10:48 ` Nicolas Saenz Julienne 2021-04-09 16:18 ` Rob Herring 2021-04-09 16:18 ` Rob Herring 2021-04-12 7:52 ` Ulf Hansson 2021-04-12 7:52 ` Ulf Hansson 2021-04-12 8:13 ` nicolas saenz julienne 2021-04-12 8:13 ` nicolas saenz julienne 2021-04-06 10:48 ` [PATCH 2/3] mmc: sdhci-iproc: Cap min clock frequency on BCM2711 Nicolas Saenz Julienne 2021-04-06 10:48 ` Nicolas Saenz Julienne 2021-04-06 17:59 ` Stefan Wahren 2021-04-06 17:59 ` Stefan Wahren 2021-04-07 8:44 ` Nicolas Saenz Julienne [this message] 2021-04-07 8:44 ` Nicolas Saenz Julienne 2021-07-30 6:44 ` Ivan T. Ivanov 2021-04-06 10:48 ` [PATCH 3/3] mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN " Nicolas Saenz Julienne 2021-04-06 10:48 ` Nicolas Saenz Julienne
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