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From: icenowy@aosc.io
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: devicetree@vger.kernel.org, Mark Brown <broonie@kernel.org>,
	linux-sunxi@googlegroups.com, Liam Girdwood <lgirdwood@gmail.com>,
	linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	Lee Jones <lee.jones@linaro.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Date: Mon, 24 Apr 2017 18:25:51 +0800	[thread overview]
Message-ID: <2970665c4666a321f14a8d2ff13bc57c@aosc.io> (raw)
In-Reply-To: <20170424071746.u2lrk43kmvvd7m25@lukather>

在 2017-04-24 15:17,Maxime Ripard 写道:
> On Thu, Apr 20, 2017 at 03:03:38PM +0800, icenowy@aosc.io wrote:
>> 在 2017-04-20 13:58,Maxime Ripard 写道:
>> > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>> > >
>> > >
>> > > 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard
>> > > <maxime.ripard@free-electrons.com> 写到:
>> > > >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> > > >> Allwinner A64 SoC features a NMI controller, which is usually
>> > > >connected
>> > > >> to the AXP PMIC.
>> > > >>
>> > > >> Add support for it.
>> > > >>
>> > > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> > > >> Acked-by: Chen-Yu Tsai <wens@csie.org>
>> > > >> ---
>> > > >> Changes in v2:
>> > > >> - Added Chen-Yu's ACK.
>> > > >>
>> > > >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>> > > >>  1 file changed, 8 insertions(+)
>> > > >>
>> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> index 05ec9fc5e81f..53c18ca372ea 100644
>> > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> @@ -403,6 +403,14 @@
>> > > >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> > > >>  		};
>> > > >>
>> > > >> +		nmi_intc: interrupt-controller@01f00c0c {
>> > > >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> > > >> +			interrupt-controller;
>> > > >> +			#interrupt-cells = <2>;
>> > > >> +			reg = <0x01f00c0c 0x38>;
>> > > >
>> > > >The base address is not correct, and there's uncertainty on whether
>> > > >this is this particular controller or not. Did you even test this?
>> > >
>> > > Tested by axp20x-pek.
>> >
>> > Still, the base address is wrong, which is yet another hint that this
>> > is not the same interrupt controller, and just works by accident.
>> 
>> No, it's the same as other post-sun6i device trees.
>> See other post-sun6i device trees: (or maybe they're all wrong, but
>> as we have no document for it, we should temporarily keep them)
>> 
>> sun6i-a31.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> sun8i-a23-a33.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> But according to the BSP device tree, the base address should be
>> 0x01f00c00. Should I send some patch to fix all of them? (but it will
>> break device tree compatibility)
> 
> I'm really not a big fan of "if we see something that is broken, just
> let it rot" to be honest.
> 
> We have no idea how this controller works exactly, just like we have
> no idea if it is exactly the same controller or not.
> 
> The only thing we have today is the memory map, and it tells us that
> it has more registers than what you express here.
> 
> Because of the DT backward compatibility, you have to think of it the
> other way around: what will happen if it turns out we need to setup
> any register outside of that region you described in the DT, in
> something like a year or so?
> 
> We can't, really. While if you have the full memory region from the
> beginning, then you just have to add a single writel in your driver.

So things are now already broken, and we may need to fix also A31 and
A23/33.

How should we do this?

> 
> Maxime
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: icenowy-h8G6r0blFSE@public.gmane.org
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Liam Girdwood <lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Date: Mon, 24 Apr 2017 18:25:51 +0800	[thread overview]
Message-ID: <2970665c4666a321f14a8d2ff13bc57c@aosc.io> (raw)
In-Reply-To: <20170424071746.u2lrk43kmvvd7m25@lukather>

在 2017-04-24 15:17,Maxime Ripard 写道:
> On Thu, Apr 20, 2017 at 03:03:38PM +0800, icenowy-h8G6r0blFSE@public.gmane.org wrote:
>> 在 2017-04-20 13:58,Maxime Ripard 写道:
>> > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>> > >
>> > >
>> > > 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard
>> > > <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 写到:
>> > > >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> > > >> Allwinner A64 SoC features a NMI controller, which is usually
>> > > >connected
>> > > >> to the AXP PMIC.
>> > > >>
>> > > >> Add support for it.
>> > > >>
>> > > >> Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
>> > > >> Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>> > > >> ---
>> > > >> Changes in v2:
>> > > >> - Added Chen-Yu's ACK.
>> > > >>
>> > > >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>> > > >>  1 file changed, 8 insertions(+)
>> > > >>
>> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> index 05ec9fc5e81f..53c18ca372ea 100644
>> > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> @@ -403,6 +403,14 @@
>> > > >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> > > >>  		};
>> > > >>
>> > > >> +		nmi_intc: interrupt-controller@01f00c0c {
>> > > >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> > > >> +			interrupt-controller;
>> > > >> +			#interrupt-cells = <2>;
>> > > >> +			reg = <0x01f00c0c 0x38>;
>> > > >
>> > > >The base address is not correct, and there's uncertainty on whether
>> > > >this is this particular controller or not. Did you even test this?
>> > >
>> > > Tested by axp20x-pek.
>> >
>> > Still, the base address is wrong, which is yet another hint that this
>> > is not the same interrupt controller, and just works by accident.
>> 
>> No, it's the same as other post-sun6i device trees.
>> See other post-sun6i device trees: (or maybe they're all wrong, but
>> as we have no document for it, we should temporarily keep them)
>> 
>> sun6i-a31.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> sun8i-a23-a33.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> But according to the BSP device tree, the base address should be
>> 0x01f00c00. Should I send some patch to fix all of them? (but it will
>> break device tree compatibility)
> 
> I'm really not a big fan of "if we see something that is broken, just
> let it rot" to be honest.
> 
> We have no idea how this controller works exactly, just like we have
> no idea if it is exactly the same controller or not.
> 
> The only thing we have today is the memory map, and it tells us that
> it has more registers than what you express here.
> 
> Because of the DT backward compatibility, you have to think of it the
> other way around: what will happen if it turns out we need to setup
> any register outside of that region you described in the DT, in
> something like a year or so?
> 
> We can't, really. While if you have the full memory region from the
> beginning, then you just have to add a single writel in your driver.

So things are now already broken, and we may need to fix also A31 and
A23/33.

How should we do this?

> 
> Maxime
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (icenowy at aosc.io)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Date: Mon, 24 Apr 2017 18:25:51 +0800	[thread overview]
Message-ID: <2970665c4666a321f14a8d2ff13bc57c@aosc.io> (raw)
In-Reply-To: <20170424071746.u2lrk43kmvvd7m25@lukather>

? 2017-04-24 15:17?Maxime Ripard ???
> On Thu, Apr 20, 2017 at 03:03:38PM +0800, icenowy at aosc.io wrote:
>> ? 2017-04-20 13:58?Maxime Ripard ???
>> > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>> > >
>> > >
>> > > ? 2017?4?18? GMT+08:00 ??3:00:16, Maxime Ripard
>> > > <maxime.ripard@free-electrons.com> ??:
>> > > >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> > > >> Allwinner A64 SoC features a NMI controller, which is usually
>> > > >connected
>> > > >> to the AXP PMIC.
>> > > >>
>> > > >> Add support for it.
>> > > >>
>> > > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> > > >> Acked-by: Chen-Yu Tsai <wens@csie.org>
>> > > >> ---
>> > > >> Changes in v2:
>> > > >> - Added Chen-Yu's ACK.
>> > > >>
>> > > >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>> > > >>  1 file changed, 8 insertions(+)
>> > > >>
>> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> index 05ec9fc5e81f..53c18ca372ea 100644
>> > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> @@ -403,6 +403,14 @@
>> > > >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> > > >>  		};
>> > > >>
>> > > >> +		nmi_intc: interrupt-controller at 01f00c0c {
>> > > >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> > > >> +			interrupt-controller;
>> > > >> +			#interrupt-cells = <2>;
>> > > >> +			reg = <0x01f00c0c 0x38>;
>> > > >
>> > > >The base address is not correct, and there's uncertainty on whether
>> > > >this is this particular controller or not. Did you even test this?
>> > >
>> > > Tested by axp20x-pek.
>> >
>> > Still, the base address is wrong, which is yet another hint that this
>> > is not the same interrupt controller, and just works by accident.
>> 
>> No, it's the same as other post-sun6i device trees.
>> See other post-sun6i device trees: (or maybe they're all wrong, but
>> as we have no document for it, we should temporarily keep them)
>> 
>> sun6i-a31.dtsi
>> ```
>> 		nmi_intc: interrupt-controller at 01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> sun8i-a23-a33.dtsi
>> ```
>> 		nmi_intc: interrupt-controller at 01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> But according to the BSP device tree, the base address should be
>> 0x01f00c00. Should I send some patch to fix all of them? (but it will
>> break device tree compatibility)
> 
> I'm really not a big fan of "if we see something that is broken, just
> let it rot" to be honest.
> 
> We have no idea how this controller works exactly, just like we have
> no idea if it is exactly the same controller or not.
> 
> The only thing we have today is the memory map, and it tells us that
> it has more registers than what you express here.
> 
> Because of the DT backward compatibility, you have to think of it the
> other way around: what will happen if it turns out we need to setup
> any register outside of that region you described in the DT, in
> something like a year or so?
> 
> We can't, really. While if you have the full memory region from the
> beginning, then you just have to add a single writel in your driver.

So things are now already broken, and we may need to fix also A31 and
A23/33.

How should we do this?

> 
> Maxime
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2017-04-24 10:26 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-17 11:57 [PATCH v3 00/12] AXP803 PMIC support for Pine64 Icenowy Zheng
2017-04-17 11:57 ` Icenowy Zheng
2017-04-17 11:57 ` Icenowy Zheng
2017-04-17 11:57 ` [PATCH v3 01/12] arm64: allwinner: a64: enable RSB on A64 Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18  5:37   ` Maxime Ripard
2017-04-18  5:37     ` Maxime Ripard
2017-04-18  5:37     ` Maxime Ripard
2017-04-17 11:57 ` [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller " Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18  7:00   ` Maxime Ripard
2017-04-18  7:00     ` Maxime Ripard
2017-04-18  7:00     ` Maxime Ripard
2017-04-18 10:56     ` [linux-sunxi] " Icenowy Zheng
2017-04-18 10:56       ` Icenowy Zheng
2017-04-18 10:56       ` Icenowy Zheng
2017-04-20  5:58       ` [linux-sunxi] " Maxime Ripard
2017-04-20  5:58         ` Maxime Ripard
2017-04-20  5:58         ` Maxime Ripard
2017-04-20  7:03         ` [linux-sunxi] " icenowy
2017-04-20  7:03           ` icenowy at aosc.io
2017-04-20  7:03           ` icenowy-h8G6r0blFSE
2017-04-24  7:17           ` [linux-sunxi] " Maxime Ripard
2017-04-24  7:17             ` Maxime Ripard
2017-04-24  7:17             ` Maxime Ripard
2017-04-24 10:25             ` icenowy [this message]
2017-04-24 10:25               ` [linux-sunxi] " icenowy at aosc.io
2017-04-24 10:25               ` icenowy-h8G6r0blFSE
2017-04-17 11:57 ` [PATCH v3 03/12] dt-bindings: make AXP20X compatible strings one per line Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18 10:35   ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18 10:35     ` Chen-Yu Tsai
2017-04-18 10:35     ` Chen-Yu Tsai
2017-04-20 14:18   ` Rob Herring
2017-04-20 14:18     ` Rob Herring
2017-04-20 14:18     ` Rob Herring
2017-04-24 12:07   ` Lee Jones
2017-04-24 12:07     ` Lee Jones
2017-04-24 12:07     ` Lee Jones
2017-04-17 11:57 ` [PATCH v3 04/12] dt-bindings: add device tree binding for X-Powers AXP803 PMIC Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-24 12:08   ` Lee Jones
2017-04-24 12:08     ` Lee Jones
2017-04-24 12:08     ` Lee Jones
2017-04-17 11:57 ` [PATCH v3 05/12] mfd: axp20x: support AXP803 variant Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-24 12:09   ` Lee Jones
2017-04-24 12:09     ` Lee Jones
2017-04-24 12:09     ` Lee Jones
2017-04-17 11:57 ` [PATCH v3 06/12] arm64: allwinner: a64: add AXP803 node to Pine64 device tree Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57 ` [PATCH v3 07/12] dt-bindings: add AXP803's regulator info Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18 10:36   ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18 10:36     ` Chen-Yu Tsai
2017-04-18 10:36     ` Chen-Yu Tsai
2017-04-24 12:09   ` Lee Jones
2017-04-24 12:09     ` Lee Jones
2017-04-24 12:09     ` Lee Jones
2017-04-17 11:57 ` [PATCH v3 08/12] regulator: axp20x-regulator: add support for AXP803 Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18 12:07   ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18 12:07     ` Chen-Yu Tsai
2017-04-18 12:07     ` Chen-Yu Tsai
2017-04-26 14:45   ` Mark Brown
2017-04-26 14:45     ` Mark Brown
2017-04-26 14:45     ` Mark Brown
2017-04-17 11:57 ` [PATCH v3 09/12] mfd: axp20x: add axp20x-regulator cell " Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18 10:38   ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18 10:38     ` Chen-Yu Tsai
2017-04-18 10:38     ` Chen-Yu Tsai
2017-04-18 10:55     ` Icenowy Zheng
2017-04-18 10:55       ` Icenowy Zheng
2017-04-18 10:55       ` Icenowy Zheng
2017-04-18 11:58       ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18 11:58         ` Chen-Yu Tsai
2017-04-18 11:58         ` Chen-Yu Tsai
2017-04-17 11:57 ` [PATCH v3 10/12] arm64: allwinner: a64: add DTSI file for AXP803 PMIC Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-18  7:08   ` Maxime Ripard
2017-04-18  7:08     ` Maxime Ripard
2017-04-18  7:08     ` Maxime Ripard
2017-04-18  7:20   ` [linux-sunxi] " Chen-Yu Tsai
2017-04-18  7:20     ` Chen-Yu Tsai
2017-04-18  7:20     ` Chen-Yu Tsai
2017-04-17 11:57 ` [PATCH v3 11/12] arm64: allwinner: a64: enable AXP803 regulators for Pine64 Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57 ` [PATCH v3 12/12] arm64: allwinner: a64: enable Wi-Fi " Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng
2017-04-17 11:57   ` Icenowy Zheng

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