From: Jianxin Pan <jianxin.pan@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Yixun Lan <yixun.lan@amlogic.com>,
Kevin Hilman <khilman@baylibre.com>,
Carlo Caione <carlo@caione.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Liang Yang <liang.yang@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Qiufang Dai <qiufang.dai@amlogic.com>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>, <linux-clk@vger.kernel.org>,
<linux-amlogic@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 13 Dec 2018 12:42:02 +0800 [thread overview]
Message-ID: <33721ac4-3564-1347-3b7b-2c795db63851@amlogic.com> (raw)
In-Reply-To: <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com>
HI Jerome,
On 2018/12/12 0:28, Jerome Brunet wrote:
> On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
>> From: Yixun Lan <yixun.lan@amlogic.com>
>>
[...]
>> +
>> +static inline struct meson_clk_phase_delay_data *
>> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
>> +{
>> + return clk->data;
>> +}
>
> This is only usefull in the related clock driver, no need to export it
OK, I will move it to clk-phase-delay.c.
Thanks for the review.
>
>> +
>> /* clk_ops */
>> extern const struct clk_ops meson_clk_pll_ro_ops;
>> extern const struct clk_ops meson_clk_pll_ops;
>> @@ -112,5 +124,6 @@ struct clk_regmap _name = {
>> \
>> extern const struct clk_ops meson_clk_mpll_ro_ops;
>> extern const struct clk_ops meson_clk_mpll_ops;
>> extern const struct clk_ops meson_clk_phase_ops;
>> +extern const struct clk_ops meson_clk_phase_delay_ops;
>>
>> #endif /* __CLKC_H */
>
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Jianxin Pan <jianxin.pan@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Yixun Lan <yixun.lan@amlogic.com>,
Kevin Hilman <khilman@baylibre.com>,
Carlo Caione <carlo@caione.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Liang Yang <liang.yang@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Qiufang Dai <qiufang.dai@amlogic.com>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 13 Dec 2018 12:42:02 +0800 [thread overview]
Message-ID: <33721ac4-3564-1347-3b7b-2c795db63851@amlogic.com> (raw)
In-Reply-To: <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com>
HI Jerome,
On 2018/12/12 0:28, Jerome Brunet wrote:
> On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
>> From: Yixun Lan <yixun.lan@amlogic.com>
>>
[...]
>> +
>> +static inline struct meson_clk_phase_delay_data *
>> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
>> +{
>> + return clk->data;
>> +}
>
> This is only usefull in the related clock driver, no need to export it
OK, I will move it to clk-phase-delay.c.
Thanks for the review.
>
>> +
>> /* clk_ops */
>> extern const struct clk_ops meson_clk_pll_ro_ops;
>> extern const struct clk_ops meson_clk_pll_ops;
>> @@ -112,5 +124,6 @@ struct clk_regmap _name = {
>> \
>> extern const struct clk_ops meson_clk_mpll_ro_ops;
>> extern const struct clk_ops meson_clk_mpll_ops;
>> extern const struct clk_ops meson_clk_phase_ops;
>> +extern const struct clk_ops meson_clk_phase_delay_ops;
>>
>> #endif /* __CLKC_H */
>
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Jianxin Pan <jianxin.pan@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Rob Herring <robh@kernel.org>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Yixun Lan <yixun.lan@amlogic.com>,
linux-kernel@vger.kernel.org,
Boris Brezillon <boris.brezillon@bootlin.com>,
Liang Yang <liang.yang@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Carlo Caione <carlo@caione.org>,
linux-amlogic@lists.infradead.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Qiufang Dai <qiufang.dai@amlogic.com>
Subject: Re: [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 13 Dec 2018 12:42:02 +0800 [thread overview]
Message-ID: <33721ac4-3564-1347-3b7b-2c795db63851@amlogic.com> (raw)
In-Reply-To: <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com>
HI Jerome,
On 2018/12/12 0:28, Jerome Brunet wrote:
> On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
>> From: Yixun Lan <yixun.lan@amlogic.com>
>>
[...]
>> +
>> +static inline struct meson_clk_phase_delay_data *
>> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
>> +{
>> + return clk->data;
>> +}
>
> This is only usefull in the related clock driver, no need to export it
OK, I will move it to clk-phase-delay.c.
Thanks for the review.
>
>> +
>> /* clk_ops */
>> extern const struct clk_ops meson_clk_pll_ro_ops;
>> extern const struct clk_ops meson_clk_pll_ops;
>> @@ -112,5 +124,6 @@ struct clk_regmap _name = {
>> \
>> extern const struct clk_ops meson_clk_mpll_ro_ops;
>> extern const struct clk_ops meson_clk_mpll_ops;
>> extern const struct clk_ops meson_clk_phase_ops;
>> +extern const struct clk_ops meson_clk_phase_delay_ops;
>>
>> #endif /* __CLKC_H */
>
>
> .
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Jianxin Pan <jianxin.pan@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Rob Herring <robh@kernel.org>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Yixun Lan <yixun.lan@amlogic.com>,
linux-kernel@vger.kernel.org,
Boris Brezillon <boris.brezillon@bootlin.com>,
Liang Yang <liang.yang@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Carlo Caione <carlo@caione.org>,
linux-amlogic@lists.infradead.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Qiufang Dai <qiufang.dai@amlogic.com>
Subject: Re: [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 13 Dec 2018 12:42:02 +0800 [thread overview]
Message-ID: <33721ac4-3564-1347-3b7b-2c795db63851@amlogic.com> (raw)
In-Reply-To: <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com>
HI Jerome,
On 2018/12/12 0:28, Jerome Brunet wrote:
> On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
>> From: Yixun Lan <yixun.lan@amlogic.com>
>>
[...]
>> +
>> +static inline struct meson_clk_phase_delay_data *
>> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
>> +{
>> + return clk->data;
>> +}
>
> This is only usefull in the related clock driver, no need to export it
OK, I will move it to clk-phase-delay.c.
Thanks for the review.
>
>> +
>> /* clk_ops */
>> extern const struct clk_ops meson_clk_pll_ro_ops;
>> extern const struct clk_ops meson_clk_pll_ops;
>> @@ -112,5 +124,6 @@ struct clk_regmap _name = {
>> \
>> extern const struct clk_ops meson_clk_mpll_ro_ops;
>> extern const struct clk_ops meson_clk_mpll_ops;
>> extern const struct clk_ops meson_clk_phase_ops;
>> +extern const struct clk_ops meson_clk_phase_delay_ops;
>>
>> #endif /* __CLKC_H */
>
>
> .
>
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2018-12-13 4:41 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-10 16:04 [PATCH RESEND v7 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-11 16:28 ` Jerome Brunet
2018-12-11 16:28 ` Jerome Brunet
2018-12-11 16:28 ` Jerome Brunet
2018-12-13 4:42 ` Jianxin Pan [this message]
2018-12-13 4:42 ` Jianxin Pan
2018-12-13 4:42 ` Jianxin Pan
2018-12-13 4:42 ` Jianxin Pan
2018-12-10 16:04 ` [PATCH RESEND v7 2/4] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` [PATCH RESEND v7 3/4] clk: meson: add sub MMC clock controller driver Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-11 16:59 ` Jerome Brunet
2018-12-11 16:59 ` Jerome Brunet
2018-12-11 16:59 ` Jerome Brunet
2018-12-13 4:55 ` Jianxin Pan
2018-12-13 4:55 ` Jianxin Pan
2018-12-13 4:55 ` Jianxin Pan
2018-12-13 9:01 ` Jerome Brunet
2018-12-13 9:01 ` Jerome Brunet
2018-12-13 9:01 ` Jerome Brunet
2018-12-14 4:19 ` Jianxin Pan
2018-12-14 4:19 ` Jianxin Pan
2018-12-14 4:19 ` Jianxin Pan
2018-12-10 16:04 ` [PATCH RESEND v7 4/4] clk: meson: add one based divider support for sclk divider Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-10 16:04 ` Jianxin Pan
2018-12-11 17:16 ` Jerome Brunet
2018-12-11 17:16 ` Jerome Brunet
2018-12-11 17:16 ` Jerome Brunet
2018-12-13 8:03 ` Jianxin Pan
2018-12-13 8:03 ` Jianxin Pan
2018-12-13 8:03 ` Jianxin Pan
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