From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 2/7] target/arm: Allow relevant HCR bits to be written for FEAT_EVT
Date: Sat, 29 Oct 2022 06:35:44 +1100 [thread overview]
Message-ID: <33814036-bcfb-857b-dac8-ae1b66d6638b@linaro.org> (raw)
In-Reply-To: <20221028134002.730598-3-peter.maydell@linaro.org>
On 10/29/22 00:39, Peter Maydell wrote:
> + if (cpu_isar_feature(any_half_evt, cpu)) {
> + valid_mask |= HCR_TICAB | HCR_TOCU | HCR_TID4;
> + }
> + if (cpu_isar_feature(any_evt, cpu)) {
> + valid_mask |= HCR_TTLBIS | HCR_TTLBOS | HCR_TICAB | HCR_TOCU | HCR_TID4;
> + }
You don't need to set bits twice. Either
if (any_evt) {
} else if (any_half_evt) {
}
or remove the half bits from the second if.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2022-10-28 19:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-28 13:39 [PATCH 0/7] target/arm: Implement FEAT_EVT Peter Maydell
2022-10-28 13:39 ` [PATCH 1/7] target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB Peter Maydell
2022-10-28 19:29 ` Richard Henderson
2022-10-28 13:39 ` [PATCH 2/7] target/arm: Allow relevant HCR bits to be written for FEAT_EVT Peter Maydell
2022-10-28 19:35 ` Richard Henderson [this message]
2022-10-28 13:39 ` [PATCH 3/7] target/arm: Implement HCR_EL2.TTLBIS traps Peter Maydell
2022-10-28 19:39 ` Richard Henderson
2022-10-28 13:39 ` [PATCH 4/7] target/arm: Implement HCR_EL2.TTLBOS traps Peter Maydell
2022-10-28 19:40 ` Richard Henderson
2022-10-28 13:40 ` [PATCH 5/7] target/arm: Implement HCR_EL2.TICAB,TOCU traps Peter Maydell
2022-10-28 19:43 ` Richard Henderson
2022-10-28 13:40 ` [PATCH 6/7] target/arm: Implement HCR_EL2.TID4 traps Peter Maydell
2022-10-28 19:46 ` Richard Henderson
2022-10-28 13:40 ` [PATCH 7/7] target/arm: Report FEAT_EVT for TCG '-cpu max' Peter Maydell
2022-10-28 19:47 ` Richard Henderson
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