Re: [PATCH v5 2/5] arm64: dts: qcom: sm8450: Add opp table support to PCIe

From: Krishna Chaitanya Chundru <quic_krichai@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>, <agross@kernel.org>,
	<andersson@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <vireshk@kernel.org>, <nm@ti.com>,
	<sboyd@kernel.org>, <mani@kernel.org>
Cc: <lpieralisi@kernel.org>, <kw@linux.com>, <robh@kernel.org>,
	<bhelgaas@google.com>, <rafael@kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-pm@vger.kernel.org>, <quic_vbadigan@quicinc.com>,
	<quic_nitegupt@quicinc.com>, <quic_skananth@quicinc.com>,
	<quic_ramkri@quicinc.com>, <quic_parass@quicinc.com>
Subject: Re: [PATCH v5 2/5] arm64: dts: qcom: sm8450: Add opp table support to PCIe
Date: Thu, 7 Sep 2023 15:26:45 +0530	[thread overview]
Message-ID: <347293d1-15e5-5412-9695-01be768283ad@quicinc.com> (raw)
In-Reply-To: <38f64349-5139-4207-91eb-cd39fabd4496@linaro.org>


On 9/7/2023 2:34 PM, Konrad Dybcio wrote:
> On 7.09.2023 08:00, Krishna chaitanya chundru wrote:
>> PCIe needs to choose the appropriate performance state of RPMH power
>> domain based up on the PCIe gen speed.
>>
>> So let's add the OPP table support to specify RPMH performance states.
>>
>> Use opp-level for the PCIe gen speed for easier use.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>> ---
> [...]
>
>> +
>> +			pcie1_opp_table: opp-table {
>> +				compatible = "operating-points-v2";
>> +
>> +				opp-1 {
>> +					opp-level = <1>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
>> +				};
>> +
>> +				opp-2 {
>> +					opp-level = <2>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
>> +				};
>> +
>> +				opp-3 {
>> +					opp-level = <3>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
> Is gen3 not supposed to require nom like on pcie0?
This particular controller instance can operate at low svs for GEN3.
> Also, can all non-maximum OPPs run at just low_svs?
This depends on the hardware capability, for this instance expect GEN4 
remaining can operate in LOW svs. It varies from controller instance to 
instance and also from target to target.
> Konrad

- KC