From: Lucas Tanure <lucas.tanure@collabora.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Thomas Gleixner <tglx@linutronix.de>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Krzysztof Wilczynski <kw@linux.com>,
Bjorn Helgaas <bhelgaas@google.com>, Qu Wenruo <wqu@suse.com>,
Piotr Oniszczuk <piotr.oniszczuk@gmail.com>,
Peter Geis <pgwipeout@gmail.com>,
Kever Yang <kever.yang@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, kernel@collabora.com,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag
Date: Fri, 10 Mar 2023 09:53:16 +0000 [thread overview]
Message-ID: <37adba14-1add-187c-01b5-5109be38018e@collabora.com> (raw)
In-Reply-To: <a43dee4ef0e72c393dea6ce924347f81@kernel.org>
On 10-03-2023 08:56, Marc Zyngier wrote:
> On 2023-03-10 08:05, Lucas Tanure wrote:
>> The GIC600 integration in RK356x, used in rk3588, doesn't support
>> any of the shareability or cacheability attributes, and requires
>> both values to be set to 0b00 for all the ITS and Redistributor
>> tables.
>>
>> This is loosely based on prior work from XiaoDong Huang and
>> Peter Geis fixing this issue specifically for Rockchip 356x.
>
> No.
>
> If we are going to do *anything* about this thing, it is by
> describing the actual topology.
What do you mean by describe the topology?
What kind of information are you expecting?
And it has to work for both DT
> and ACPI.
>
> Alternatively, this is an erratum.
>
> M.
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Tanure <lucas.tanure@collabora.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Thomas Gleixner <tglx@linutronix.de>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Krzysztof Wilczynski <kw@linux.com>,
Bjorn Helgaas <bhelgaas@google.com>, Qu Wenruo <wqu@suse.com>,
Piotr Oniszczuk <piotr.oniszczuk@gmail.com>,
Peter Geis <pgwipeout@gmail.com>,
Kever Yang <kever.yang@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, kernel@collabora.com,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag
Date: Fri, 10 Mar 2023 09:53:16 +0000 [thread overview]
Message-ID: <37adba14-1add-187c-01b5-5109be38018e@collabora.com> (raw)
In-Reply-To: <a43dee4ef0e72c393dea6ce924347f81@kernel.org>
On 10-03-2023 08:56, Marc Zyngier wrote:
> On 2023-03-10 08:05, Lucas Tanure wrote:
>> The GIC600 integration in RK356x, used in rk3588, doesn't support
>> any of the shareability or cacheability attributes, and requires
>> both values to be set to 0b00 for all the ITS and Redistributor
>> tables.
>>
>> This is loosely based on prior work from XiaoDong Huang and
>> Peter Geis fixing this issue specifically for Rockchip 356x.
>
> No.
>
> If we are going to do *anything* about this thing, it is by
> describing the actual topology.
What do you mean by describe the topology?
What kind of information are you expecting?
And it has to work for both DT
> and ACPI.
>
> Alternatively, this is an erratum.
>
> M.
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Tanure <lucas.tanure@collabora.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Thomas Gleixner <tglx@linutronix.de>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Krzysztof Wilczynski <kw@linux.com>,
Bjorn Helgaas <bhelgaas@google.com>, Qu Wenruo <wqu@suse.com>,
Piotr Oniszczuk <piotr.oniszczuk@gmail.com>,
Peter Geis <pgwipeout@gmail.com>,
Kever Yang <kever.yang@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, kernel@collabora.com,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag
Date: Fri, 10 Mar 2023 09:53:16 +0000 [thread overview]
Message-ID: <37adba14-1add-187c-01b5-5109be38018e@collabora.com> (raw)
In-Reply-To: <a43dee4ef0e72c393dea6ce924347f81@kernel.org>
On 10-03-2023 08:56, Marc Zyngier wrote:
> On 2023-03-10 08:05, Lucas Tanure wrote:
>> The GIC600 integration in RK356x, used in rk3588, doesn't support
>> any of the shareability or cacheability attributes, and requires
>> both values to be set to 0b00 for all the ITS and Redistributor
>> tables.
>>
>> This is loosely based on prior work from XiaoDong Huang and
>> Peter Geis fixing this issue specifically for Rockchip 356x.
>
> No.
>
> If we are going to do *anything* about this thing, it is by
> describing the actual topology.
What do you mean by describe the topology?
What kind of information are you expecting?
And it has to work for both DT
> and ACPI.
>
> Alternatively, this is an erratum.
>
> M.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Tanure <lucas.tanure@collabora.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Thomas Gleixner <tglx@linutronix.de>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Krzysztof Wilczynski <kw@linux.com>,
Bjorn Helgaas <bhelgaas@google.com>, Qu Wenruo <wqu@suse.com>,
Piotr Oniszczuk <piotr.oniszczuk@gmail.com>,
Peter Geis <pgwipeout@gmail.com>,
Kever Yang <kever.yang@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, kernel@collabora.com,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag
Date: Fri, 10 Mar 2023 09:53:16 +0000 [thread overview]
Message-ID: <37adba14-1add-187c-01b5-5109be38018e@collabora.com> (raw)
In-Reply-To: <a43dee4ef0e72c393dea6ce924347f81@kernel.org>
On 10-03-2023 08:56, Marc Zyngier wrote:
> On 2023-03-10 08:05, Lucas Tanure wrote:
>> The GIC600 integration in RK356x, used in rk3588, doesn't support
>> any of the shareability or cacheability attributes, and requires
>> both values to be set to 0b00 for all the ITS and Redistributor
>> tables.
>>
>> This is loosely based on prior work from XiaoDong Huang and
>> Peter Geis fixing this issue specifically for Rockchip 356x.
>
> No.
>
> If we are going to do *anything* about this thing, it is by
> describing the actual topology.
What do you mean by describe the topology?
What kind of information are you expecting?
And it has to work for both DT
> and ACPI.
>
> Alternatively, this is an erratum.
>
> M.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-03-10 9:53 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 8:05 [PATCH 0/7] Add PCIe2 support for Rockchip Boards Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:56 ` Marc Zyngier
2023-03-10 8:56 ` Marc Zyngier
2023-03-10 8:56 ` Marc Zyngier
2023-03-10 8:56 ` Marc Zyngier
2023-03-10 9:53 ` Lucas Tanure [this message]
2023-03-10 9:53 ` Lucas Tanure
2023-03-10 9:53 ` Lucas Tanure
2023-03-10 9:53 ` Lucas Tanure
2023-03-10 10:44 ` Marc Zyngier
2023-03-10 10:44 ` Marc Zyngier
2023-03-10 10:44 ` Marc Zyngier
2023-03-10 10:44 ` Marc Zyngier
2023-03-10 11:41 ` Peter Geis
2023-03-10 11:41 ` Peter Geis
2023-03-10 11:41 ` Peter Geis
2023-03-10 11:41 ` Peter Geis
2023-03-10 11:56 ` Marc Zyngier
2023-03-10 11:56 ` Marc Zyngier
2023-03-10 11:56 ` Marc Zyngier
2023-03-10 11:56 ` Marc Zyngier
2023-03-10 12:04 ` Peter Geis
2023-03-10 12:04 ` Peter Geis
2023-03-10 12:04 ` Peter Geis
2023-03-10 12:04 ` Peter Geis
2023-03-10 12:12 ` Marc Zyngier
2023-03-10 12:12 ` Marc Zyngier
2023-03-10 12:12 ` Marc Zyngier
2023-03-10 12:12 ` Marc Zyngier
2023-03-10 12:04 ` Robin Murphy
2023-03-10 12:04 ` Robin Murphy
2023-03-10 12:04 ` Robin Murphy
2023-03-10 12:04 ` Robin Murphy
2023-03-14 13:25 ` Lucas Tanure
2023-03-14 13:25 ` Lucas Tanure
2023-03-14 13:25 ` Lucas Tanure
2023-03-14 13:25 ` Lucas Tanure
2023-03-14 14:14 ` Marc Zyngier
2023-03-14 14:14 ` Marc Zyngier
2023-03-14 14:14 ` Marc Zyngier
2023-03-14 14:14 ` Marc Zyngier
2023-03-10 8:05 ` [PATCH 2/7] PCI: rockchip-dwc: Add rk3588 compatible line Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` [PATCH 3/7] dt-bindings: phy: rockchip: " Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-12 11:31 ` Krzysztof Kozlowski
2023-03-12 11:31 ` Krzysztof Kozlowski
2023-03-12 11:31 ` Krzysztof Kozlowski
2023-03-12 11:31 ` Krzysztof Kozlowski
2023-03-10 8:05 ` [PATCH 4/7] phy: rockchip: Add naneng combo phy support for RK3588 Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 12:31 ` Peter Geis
2023-03-10 12:31 ` Peter Geis
2023-03-10 12:31 ` Peter Geis
2023-03-10 12:31 ` Peter Geis
2023-03-10 8:05 ` [PATCH 5/7] arm64: dts: rockchip: Add ITS GIC600 configuration for rk3588s Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` [PATCH 6/7] arm64: dts: rockchip: Add PCIE2.0x1 lane @fe190000 for RK3588s Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` [PATCH 7/7] arm64: dts: rockchip: RK3588s: Enable PCIE2.0x1 @fe190000 Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
2023-03-10 8:05 ` Lucas Tanure
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