From: Qianggui Song <qianggui.song@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-gpio@vger.kernel.org>
Cc: Xingyu Chen <xingyu.chen@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Carlo Caione <carlo@caione.org>, Rob Herring <robh+dt@kernel.org>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Mark Rutland <mark.rutland@arm.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
Date: Tue, 17 Sep 2019 18:29:23 +0800 [thread overview]
Message-ID: <3a4bdcbf-883a-cf31-6af1-a692a10cb9a5@amlogic.com> (raw)
In-Reply-To: <131cf06f-2530-4524-9f86-3c07641bb460@baylibre.com>
Hi, Neil
Thanks for your review
On 2019/9/17 15:18, Neil Armstrong wrote:
> Hi,
>
> On 17/09/2019 08:07, Qianggui Song wrote:
>> Add new compatible name for Amlogic's Meson-A1 pin controller
>> add a dt-binding header file which document the detail pin names.
>
> Please add in the commit log that A1 doesn't need the DS bank reg,
> so when we will convert these bindings to yaml we will be aware of it.
>
OK, will add it in the next patch
>>
>> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>> ---
>> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
>> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
>> 2 files changed, 74 insertions(+)
>> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> index 10dc4f7..0aff1f2 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> @@ -15,6 +15,7 @@ Required properties for the root node:
>> "amlogic,meson-axg-aobus-pinctrl"
>> "amlogic,meson-g12a-periphs-pinctrl"
>> "amlogic,meson-g12a-aobus-pinctrl"
>> + "amlogic,meson-a1-periphs-pinctrl"
>> - reg: address and size of registers controlling irq functionality
>>
>> === GPIO sub-nodes ===
>> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
>> new file mode 100644
>> index 0000000..40e57a5
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
>> @@ -0,0 +1,73 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +/*
>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>> + * Author: Qianggui Song <qianggui.song@amlogic.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
>> +#define _DT_BINDINGS_MESON_A1_GPIO_H
>> +
>> +#define GPIOP_0 0
>> +#define GPIOP_1 1
>> +#define GPIOP_2 2
>> +#define GPIOP_3 3
>> +#define GPIOP_4 4
>> +#define GPIOP_5 5
>> +#define GPIOP_6 6
>> +#define GPIOP_7 7
>> +#define GPIOP_8 8
>> +#define GPIOP_9 9
>> +#define GPIOP_10 10
>> +#define GPIOP_11 11
>> +#define GPIOP_12 12
>> +#define GPIOB_0 13
>> +#define GPIOB_1 14
>> +#define GPIOB_2 15
>> +#define GPIOB_3 16
>> +#define GPIOB_4 17
>> +#define GPIOB_5 18
>> +#define GPIOB_6 19
>> +#define GPIOX_0 20
>> +#define GPIOX_1 21
>> +#define GPIOX_2 22
>> +#define GPIOX_3 23
>> +#define GPIOX_4 24
>> +#define GPIOX_5 25
>> +#define GPIOX_6 26
>> +#define GPIOX_7 27
>> +#define GPIOX_8 28
>> +#define GPIOX_9 29
>> +#define GPIOX_10 30
>> +#define GPIOX_11 31
>> +#define GPIOX_12 32
>> +#define GPIOX_13 33
>> +#define GPIOX_14 34
>> +#define GPIOX_15 35
>> +#define GPIOX_16 36
>> +#define GPIOF_0 37
>> +#define GPIOF_1 38
>> +#define GPIOF_2 39
>> +#define GPIOF_3 40
>> +#define GPIOF_4 41
>> +#define GPIOF_5 42
>> +#define GPIOF_6 43
>> +#define GPIOF_7 44
>> +#define GPIOF_8 45
>> +#define GPIOF_9 46
>> +#define GPIOF_10 47
>> +#define GPIOF_11 48
>> +#define GPIOF_12 49
>> +#define GPIOA_0 50
>> +#define GPIOA_1 51
>> +#define GPIOA_2 52
>> +#define GPIOA_3 53
>> +#define GPIOA_4 54
>> +#define GPIOA_5 55
>> +#define GPIOA_6 56
>> +#define GPIOA_7 57
>> +#define GPIOA_8 58
>> +#define GPIOA_9 59
>> +#define GPIOA_10 60
>> +#define GPIOA_11 61
>> +
>> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>>
>
>
> With that fixed,
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Neil
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Qianggui Song <qianggui.song@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org
Cc: Xingyu Chen <xingyu.chen@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Carlo Caione <carlo@caione.org>, Rob Herring <robh+dt@kernel.org>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
Date: Tue, 17 Sep 2019 18:29:23 +0800 [thread overview]
Message-ID: <3a4bdcbf-883a-cf31-6af1-a692a10cb9a5@amlogic.com> (raw)
In-Reply-To: <131cf06f-2530-4524-9f86-3c07641bb460@baylibre.com>
Hi, Neil
Thanks for your review
On 2019/9/17 15:18, Neil Armstrong wrote:
> Hi,
>
> On 17/09/2019 08:07, Qianggui Song wrote:
>> Add new compatible name for Amlogic's Meson-A1 pin controller
>> add a dt-binding header file which document the detail pin names.
>
> Please add in the commit log that A1 doesn't need the DS bank reg,
> so when we will convert these bindings to yaml we will be aware of it.
>
OK, will add it in the next patch
>>
>> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>> ---
>> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
>> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
>> 2 files changed, 74 insertions(+)
>> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> index 10dc4f7..0aff1f2 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> @@ -15,6 +15,7 @@ Required properties for the root node:
>> "amlogic,meson-axg-aobus-pinctrl"
>> "amlogic,meson-g12a-periphs-pinctrl"
>> "amlogic,meson-g12a-aobus-pinctrl"
>> + "amlogic,meson-a1-periphs-pinctrl"
>> - reg: address and size of registers controlling irq functionality
>>
>> === GPIO sub-nodes ===
>> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
>> new file mode 100644
>> index 0000000..40e57a5
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
>> @@ -0,0 +1,73 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +/*
>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>> + * Author: Qianggui Song <qianggui.song@amlogic.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
>> +#define _DT_BINDINGS_MESON_A1_GPIO_H
>> +
>> +#define GPIOP_0 0
>> +#define GPIOP_1 1
>> +#define GPIOP_2 2
>> +#define GPIOP_3 3
>> +#define GPIOP_4 4
>> +#define GPIOP_5 5
>> +#define GPIOP_6 6
>> +#define GPIOP_7 7
>> +#define GPIOP_8 8
>> +#define GPIOP_9 9
>> +#define GPIOP_10 10
>> +#define GPIOP_11 11
>> +#define GPIOP_12 12
>> +#define GPIOB_0 13
>> +#define GPIOB_1 14
>> +#define GPIOB_2 15
>> +#define GPIOB_3 16
>> +#define GPIOB_4 17
>> +#define GPIOB_5 18
>> +#define GPIOB_6 19
>> +#define GPIOX_0 20
>> +#define GPIOX_1 21
>> +#define GPIOX_2 22
>> +#define GPIOX_3 23
>> +#define GPIOX_4 24
>> +#define GPIOX_5 25
>> +#define GPIOX_6 26
>> +#define GPIOX_7 27
>> +#define GPIOX_8 28
>> +#define GPIOX_9 29
>> +#define GPIOX_10 30
>> +#define GPIOX_11 31
>> +#define GPIOX_12 32
>> +#define GPIOX_13 33
>> +#define GPIOX_14 34
>> +#define GPIOX_15 35
>> +#define GPIOX_16 36
>> +#define GPIOF_0 37
>> +#define GPIOF_1 38
>> +#define GPIOF_2 39
>> +#define GPIOF_3 40
>> +#define GPIOF_4 41
>> +#define GPIOF_5 42
>> +#define GPIOF_6 43
>> +#define GPIOF_7 44
>> +#define GPIOF_8 45
>> +#define GPIOF_9 46
>> +#define GPIOF_10 47
>> +#define GPIOF_11 48
>> +#define GPIOF_12 49
>> +#define GPIOA_0 50
>> +#define GPIOA_1 51
>> +#define GPIOA_2 52
>> +#define GPIOA_3 53
>> +#define GPIOA_4 54
>> +#define GPIOA_5 55
>> +#define GPIOA_6 56
>> +#define GPIOA_7 57
>> +#define GPIOA_8 58
>> +#define GPIOA_9 59
>> +#define GPIOA_10 60
>> +#define GPIOA_11 61
>> +
>> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>>
>
>
> With that fixed,
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Neil
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Qianggui Song <qianggui.song@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-gpio@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Hanjie Lin <hanjie.lin@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Kevin Hilman <khilman@baylibre.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Carlo Caione <carlo@caione.org>,
linux-amlogic@lists.infradead.org,
Xingyu Chen <xingyu.chen@amlogic.com>,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
Date: Tue, 17 Sep 2019 18:29:23 +0800 [thread overview]
Message-ID: <3a4bdcbf-883a-cf31-6af1-a692a10cb9a5@amlogic.com> (raw)
In-Reply-To: <131cf06f-2530-4524-9f86-3c07641bb460@baylibre.com>
Hi, Neil
Thanks for your review
On 2019/9/17 15:18, Neil Armstrong wrote:
> Hi,
>
> On 17/09/2019 08:07, Qianggui Song wrote:
>> Add new compatible name for Amlogic's Meson-A1 pin controller
>> add a dt-binding header file which document the detail pin names.
>
> Please add in the commit log that A1 doesn't need the DS bank reg,
> so when we will convert these bindings to yaml we will be aware of it.
>
OK, will add it in the next patch
>>
>> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>> ---
>> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
>> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
>> 2 files changed, 74 insertions(+)
>> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> index 10dc4f7..0aff1f2 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> @@ -15,6 +15,7 @@ Required properties for the root node:
>> "amlogic,meson-axg-aobus-pinctrl"
>> "amlogic,meson-g12a-periphs-pinctrl"
>> "amlogic,meson-g12a-aobus-pinctrl"
>> + "amlogic,meson-a1-periphs-pinctrl"
>> - reg: address and size of registers controlling irq functionality
>>
>> === GPIO sub-nodes ===
>> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
>> new file mode 100644
>> index 0000000..40e57a5
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
>> @@ -0,0 +1,73 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +/*
>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>> + * Author: Qianggui Song <qianggui.song@amlogic.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
>> +#define _DT_BINDINGS_MESON_A1_GPIO_H
>> +
>> +#define GPIOP_0 0
>> +#define GPIOP_1 1
>> +#define GPIOP_2 2
>> +#define GPIOP_3 3
>> +#define GPIOP_4 4
>> +#define GPIOP_5 5
>> +#define GPIOP_6 6
>> +#define GPIOP_7 7
>> +#define GPIOP_8 8
>> +#define GPIOP_9 9
>> +#define GPIOP_10 10
>> +#define GPIOP_11 11
>> +#define GPIOP_12 12
>> +#define GPIOB_0 13
>> +#define GPIOB_1 14
>> +#define GPIOB_2 15
>> +#define GPIOB_3 16
>> +#define GPIOB_4 17
>> +#define GPIOB_5 18
>> +#define GPIOB_6 19
>> +#define GPIOX_0 20
>> +#define GPIOX_1 21
>> +#define GPIOX_2 22
>> +#define GPIOX_3 23
>> +#define GPIOX_4 24
>> +#define GPIOX_5 25
>> +#define GPIOX_6 26
>> +#define GPIOX_7 27
>> +#define GPIOX_8 28
>> +#define GPIOX_9 29
>> +#define GPIOX_10 30
>> +#define GPIOX_11 31
>> +#define GPIOX_12 32
>> +#define GPIOX_13 33
>> +#define GPIOX_14 34
>> +#define GPIOX_15 35
>> +#define GPIOX_16 36
>> +#define GPIOF_0 37
>> +#define GPIOF_1 38
>> +#define GPIOF_2 39
>> +#define GPIOF_3 40
>> +#define GPIOF_4 41
>> +#define GPIOF_5 42
>> +#define GPIOF_6 43
>> +#define GPIOF_7 44
>> +#define GPIOF_8 45
>> +#define GPIOF_9 46
>> +#define GPIOF_10 47
>> +#define GPIOF_11 48
>> +#define GPIOF_12 49
>> +#define GPIOA_0 50
>> +#define GPIOA_1 51
>> +#define GPIOA_2 52
>> +#define GPIOA_3 53
>> +#define GPIOA_4 54
>> +#define GPIOA_5 55
>> +#define GPIOA_6 56
>> +#define GPIOA_7 57
>> +#define GPIOA_8 58
>> +#define GPIOA_9 59
>> +#define GPIOA_10 60
>> +#define GPIOA_11 61
>> +
>> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>>
>
>
> With that fixed,
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Neil
>
> .
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Qianggui Song <qianggui.song@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-gpio@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Hanjie Lin <hanjie.lin@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Kevin Hilman <khilman@baylibre.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Carlo Caione <carlo@caione.org>,
linux-amlogic@lists.infradead.org,
Xingyu Chen <xingyu.chen@amlogic.com>,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
Date: Tue, 17 Sep 2019 18:29:23 +0800 [thread overview]
Message-ID: <3a4bdcbf-883a-cf31-6af1-a692a10cb9a5@amlogic.com> (raw)
In-Reply-To: <131cf06f-2530-4524-9f86-3c07641bb460@baylibre.com>
Hi, Neil
Thanks for your review
On 2019/9/17 15:18, Neil Armstrong wrote:
> Hi,
>
> On 17/09/2019 08:07, Qianggui Song wrote:
>> Add new compatible name for Amlogic's Meson-A1 pin controller
>> add a dt-binding header file which document the detail pin names.
>
> Please add in the commit log that A1 doesn't need the DS bank reg,
> so when we will convert these bindings to yaml we will be aware of it.
>
OK, will add it in the next patch
>>
>> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>> ---
>> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
>> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
>> 2 files changed, 74 insertions(+)
>> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> index 10dc4f7..0aff1f2 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> @@ -15,6 +15,7 @@ Required properties for the root node:
>> "amlogic,meson-axg-aobus-pinctrl"
>> "amlogic,meson-g12a-periphs-pinctrl"
>> "amlogic,meson-g12a-aobus-pinctrl"
>> + "amlogic,meson-a1-periphs-pinctrl"
>> - reg: address and size of registers controlling irq functionality
>>
>> === GPIO sub-nodes ===
>> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
>> new file mode 100644
>> index 0000000..40e57a5
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
>> @@ -0,0 +1,73 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +/*
>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>> + * Author: Qianggui Song <qianggui.song@amlogic.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
>> +#define _DT_BINDINGS_MESON_A1_GPIO_H
>> +
>> +#define GPIOP_0 0
>> +#define GPIOP_1 1
>> +#define GPIOP_2 2
>> +#define GPIOP_3 3
>> +#define GPIOP_4 4
>> +#define GPIOP_5 5
>> +#define GPIOP_6 6
>> +#define GPIOP_7 7
>> +#define GPIOP_8 8
>> +#define GPIOP_9 9
>> +#define GPIOP_10 10
>> +#define GPIOP_11 11
>> +#define GPIOP_12 12
>> +#define GPIOB_0 13
>> +#define GPIOB_1 14
>> +#define GPIOB_2 15
>> +#define GPIOB_3 16
>> +#define GPIOB_4 17
>> +#define GPIOB_5 18
>> +#define GPIOB_6 19
>> +#define GPIOX_0 20
>> +#define GPIOX_1 21
>> +#define GPIOX_2 22
>> +#define GPIOX_3 23
>> +#define GPIOX_4 24
>> +#define GPIOX_5 25
>> +#define GPIOX_6 26
>> +#define GPIOX_7 27
>> +#define GPIOX_8 28
>> +#define GPIOX_9 29
>> +#define GPIOX_10 30
>> +#define GPIOX_11 31
>> +#define GPIOX_12 32
>> +#define GPIOX_13 33
>> +#define GPIOX_14 34
>> +#define GPIOX_15 35
>> +#define GPIOX_16 36
>> +#define GPIOF_0 37
>> +#define GPIOF_1 38
>> +#define GPIOF_2 39
>> +#define GPIOF_3 40
>> +#define GPIOF_4 41
>> +#define GPIOF_5 42
>> +#define GPIOF_6 43
>> +#define GPIOF_7 44
>> +#define GPIOF_8 45
>> +#define GPIOF_9 46
>> +#define GPIOF_10 47
>> +#define GPIOF_11 48
>> +#define GPIOF_12 49
>> +#define GPIOA_0 50
>> +#define GPIOA_1 51
>> +#define GPIOA_2 52
>> +#define GPIOA_3 53
>> +#define GPIOA_4 54
>> +#define GPIOA_5 55
>> +#define GPIOA_6 56
>> +#define GPIOA_7 57
>> +#define GPIOA_8 58
>> +#define GPIOA_9 59
>> +#define GPIOA_10 60
>> +#define GPIOA_11 61
>> +
>> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>>
>
>
> With that fixed,
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Neil
>
> .
>
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2019-09-17 10:28 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-17 6:07 [PATCH 0/3] pinctrl: meson-a1: add pinctrl driver Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 7:18 ` Neil Armstrong
2019-09-17 7:18 ` Neil Armstrong
2019-09-17 7:18 ` Neil Armstrong
2019-09-17 10:29 ` Qianggui Song [this message]
2019-09-17 10:29 ` Qianggui Song
2019-09-17 10:29 ` Qianggui Song
2019-09-17 10:29 ` Qianggui Song
2019-09-30 22:47 ` Rob Herring
2019-09-30 22:47 ` Rob Herring
2019-09-30 22:47 ` Rob Herring
2019-09-30 22:47 ` Rob Herring
2019-09-17 6:07 ` [PATCH 2/3] pinctrl: meson-a1: add pinctrl driver for Meson A1 Soc Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 7:15 ` Neil Armstrong
2019-09-17 7:15 ` Neil Armstrong
2019-09-17 7:15 ` Neil Armstrong
2019-09-17 10:59 ` Qianggui Song
2019-09-17 10:59 ` Qianggui Song
2019-09-17 10:59 ` Qianggui Song
2019-09-17 9:29 ` Jerome Brunet
2019-09-17 9:29 ` Jerome Brunet
2019-09-17 9:29 ` Jerome Brunet
2019-09-17 11:51 ` Qianggui Song
2019-09-17 11:51 ` Qianggui Song
2019-09-17 11:51 ` Qianggui Song
2019-09-17 14:07 ` Jerome Brunet
2019-09-17 14:07 ` Jerome Brunet
2019-09-17 14:07 ` Jerome Brunet
2019-09-18 6:36 ` Qianggui Song
2019-09-18 6:36 ` Qianggui Song
2019-09-18 6:36 ` Qianggui Song
2019-09-19 16:26 ` Jerome Brunet
2019-09-19 16:26 ` Jerome Brunet
2019-09-19 16:26 ` Jerome Brunet
2019-09-23 7:29 ` Qianggui Song
2019-09-23 7:29 ` Qianggui Song
2019-09-23 7:29 ` Qianggui Song
2019-09-17 6:07 ` [PATCH 3/3] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
2019-09-17 6:07 ` Qianggui Song
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3a4bdcbf-883a-cf31-6af1-a692a10cb9a5@amlogic.com \
--to=qianggui.song@amlogic.com \
--cc=carlo@caione.org \
--cc=devicetree@vger.kernel.org \
--cc=hanjie.lin@amlogic.com \
--cc=jbrunet@baylibre.com \
--cc=jianxin.pan@amlogic.com \
--cc=khilman@baylibre.com \
--cc=linus.walleij@linaro.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=martin.blumenstingl@googlemail.com \
--cc=narmstrong@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=xingyu.chen@amlogic.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.