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From: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jonathan Hunter
	<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Laxman Dewangan
	<ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Prashant Gaikwad
	<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v1 4/5] dmaengine: Add driver for NVIDIA Tegra AHB DMA controller
Date: Thu, 28 Sep 2017 19:37:45 +0300	[thread overview]
Message-ID: <3d7e0b5e-563a-5955-cb06-36ffa1b7e30f@gmail.com> (raw)
In-Reply-To: <20170928162238.GF30097@localhost>

On 28.09.2017 19:22, Vinod Koul wrote:
> On Thu, Sep 28, 2017 at 05:35:59PM +0300, Dmitry Osipenko wrote:
>> On 28.09.2017 17:06, Dmitry Osipenko wrote:
>>> On 28.09.2017 12:29, Vinod Koul wrote:
>>>>> +	default:
>>>>> +		return -EINVAL;
>>>>> +	}
>>>>> +
>>>>> +	ahb_seq  = burst << TEGRA_AHBDMA_CHANNEL_AHB_BURST_SHIFT;
>>>>> +	ahb_seq |= TEGRA_AHBDMA_CHANNEL_ADDR_WRAP;
>>>>> +	ahb_seq |= TEGRA_AHBDMA_CHANNEL_INTR_ENB;
>>>>> +
>>>>> +	writel_relaxed(ahb_seq,
>>>>> +		       ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_SEQ);
>>>>> +
>>>>> +	writel_relaxed(ahb_addr,
>>>>> +		       ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_PTR);
>>>>
>>>> oh no, you don't write to HW here. This can be called anytime when you have
>>>> txn running! You should save these and use them in prep_ calls.
>>>>
>>>
>>> BTW, some of the DMA drivers have exactly the same problem. I now see that it is
>>> actually documented explicitly in provider.txt, but that's inconsistent across
>>> the actual drivers.
>>>
>>
>> Also, shouldn't prep_ and dma_slave_config be protected with locking? I don't
>> see DMA core doing any locking and seems none of the drivers too.
> 
> In prep when you modify the list yes (with vchan I suspect that maybe taken
> care), but in general yes driver needs to do that
> 

I meant that one CPU could modify channels config, while other CPU is preparing
the new TX using config that is in process of the modification. On the other
hand, this looks like something that DMA client should take care of.

-- 
Dmitry

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Vinod Koul <vinod.koul@intel.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	dmaengine@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 4/5] dmaengine: Add driver for NVIDIA Tegra AHB DMA controller
Date: Thu, 28 Sep 2017 19:37:45 +0300	[thread overview]
Message-ID: <3d7e0b5e-563a-5955-cb06-36ffa1b7e30f@gmail.com> (raw)
In-Reply-To: <20170928162238.GF30097@localhost>

On 28.09.2017 19:22, Vinod Koul wrote:
> On Thu, Sep 28, 2017 at 05:35:59PM +0300, Dmitry Osipenko wrote:
>> On 28.09.2017 17:06, Dmitry Osipenko wrote:
>>> On 28.09.2017 12:29, Vinod Koul wrote:
>>>>> +	default:
>>>>> +		return -EINVAL;
>>>>> +	}
>>>>> +
>>>>> +	ahb_seq  = burst << TEGRA_AHBDMA_CHANNEL_AHB_BURST_SHIFT;
>>>>> +	ahb_seq |= TEGRA_AHBDMA_CHANNEL_ADDR_WRAP;
>>>>> +	ahb_seq |= TEGRA_AHBDMA_CHANNEL_INTR_ENB;
>>>>> +
>>>>> +	writel_relaxed(ahb_seq,
>>>>> +		       ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_SEQ);
>>>>> +
>>>>> +	writel_relaxed(ahb_addr,
>>>>> +		       ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_PTR);
>>>>
>>>> oh no, you don't write to HW here. This can be called anytime when you have
>>>> txn running! You should save these and use them in prep_ calls.
>>>>
>>>
>>> BTW, some of the DMA drivers have exactly the same problem. I now see that it is
>>> actually documented explicitly in provider.txt, but that's inconsistent across
>>> the actual drivers.
>>>
>>
>> Also, shouldn't prep_ and dma_slave_config be protected with locking? I don't
>> see DMA core doing any locking and seems none of the drivers too.
> 
> In prep when you modify the list yes (with vchan I suspect that maybe taken
> care), but in general yes driver needs to do that
> 

I meant that one CPU could modify channels config, while other CPU is preparing
the new TX using config that is in process of the modification. On the other
hand, this looks like something that DMA client should take care of.

-- 
Dmitry

  reply	other threads:[~2017-09-28 16:37 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-25 23:22 [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Dmitry Osipenko
2017-09-25 23:22 ` Dmitry Osipenko
2017-09-25 23:22 ` [PATCH v1 1/5] clk: tegra: Add AHB DMA clock entry Dmitry Osipenko
2017-09-26  9:56   ` Peter De Schrijver
2017-09-26  9:56     ` Peter De Schrijver
2017-09-26 14:46     ` Dmitry Osipenko
2017-09-27  8:36       ` Peter De Schrijver
2017-09-27  8:36         ` Peter De Schrijver
2017-09-27  9:41         ` Dmitry Osipenko
2017-09-25 23:22 ` [PATCH v1 2/5] clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20 Dmitry Osipenko
2017-09-26 10:01   ` Peter De Schrijver
2017-09-26 10:01     ` Peter De Schrijver
2017-09-25 23:22 ` [PATCH v1 4/5] dmaengine: Add driver for NVIDIA Tegra AHB DMA controller Dmitry Osipenko
2017-09-26 14:45   ` Jon Hunter
2017-09-26 14:45     ` Jon Hunter
     [not found]     ` <481add20-9cea-a91a-e72c-45a824362e64-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-09-26 16:06       ` Dmitry Osipenko
2017-09-26 16:06         ` Dmitry Osipenko
2017-09-26 21:37         ` Jon Hunter
2017-09-26 21:37           ` Jon Hunter
     [not found]           ` <8fa6108d-421d-8054-c05c-9681a0e25518-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-09-26 23:00             ` Dmitry Osipenko
2017-09-26 23:00               ` Dmitry Osipenko
2017-09-28  9:29   ` Vinod Koul
2017-09-28 12:17     ` Dmitry Osipenko
2017-09-28 12:17       ` Dmitry Osipenko
2017-09-28 14:06     ` Dmitry Osipenko
2017-09-28 14:06       ` Dmitry Osipenko
2017-09-28 14:35       ` Dmitry Osipenko
     [not found]         ` <260fa409-0d07-ec9e-9e3b-fb08255026d8-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-28 16:22           ` Vinod Koul
2017-09-28 16:22             ` Vinod Koul
2017-09-28 16:37             ` Dmitry Osipenko [this message]
2017-09-28 16:37               ` Dmitry Osipenko
2017-09-28 16:21       ` Vinod Koul
     [not found] ` <cover.1506380746.git.digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-25 23:22   ` [PATCH v1 3/5] dt-bindings: Add DT bindings " Dmitry Osipenko
2017-09-25 23:22     ` Dmitry Osipenko
2017-09-26 14:50     ` Jon Hunter
2017-09-26 14:50       ` Jon Hunter
2017-09-26 15:16       ` Dmitry Osipenko
     [not found]       ` <bee2a524-0891-01e1-4e03-f6cf6a89e6b1-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-09-27  1:57         ` Dmitry Osipenko
2017-09-27  1:57           ` Dmitry Osipenko
2017-09-27  8:34           ` Jon Hunter
2017-09-27  8:34             ` Jon Hunter
2017-09-27 12:12             ` Dmitry Osipenko
     [not found]               ` <69ea8dec-db7a-fcfa-6fa7-ea70de4c9ef4-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-27 13:44                 ` Jon Hunter
2017-09-27 13:44                   ` Jon Hunter
2017-09-27 13:46                   ` Jon Hunter
2017-09-27 13:46                     ` Jon Hunter
     [not found]                     ` <432fff47-6750-08c4-a91d-1a5d154245bc-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-09-27 14:29                       ` Dmitry Osipenko
2017-09-27 14:29                         ` Dmitry Osipenko
2017-09-27 23:32             ` Stephen Boyd
2017-09-28  8:33               ` Jon Hunter
2017-09-28  8:33                 ` Jon Hunter
     [not found]             ` <0fd316e9-3584-e9bd-2a8b-e73eaa6a9a48-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-09-29 19:30               ` Stephen Warren
2017-09-29 19:30                 ` Stephen Warren
2017-09-30  3:11                 ` Dmitry Osipenko
2017-10-02 17:05                   ` Stephen Warren
2017-10-02 23:02                     ` Dmitry Osipenko
2017-10-03 10:32                       ` Jon Hunter
2017-10-03 10:32                         ` Jon Hunter
2017-10-03 10:32                         ` Jon Hunter
     [not found]                         ` <4443a8fb-7a4d-922b-2dd3-53236d39a050-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-10-03 12:07                           ` Dmitry Osipenko
2017-10-03 12:07                             ` Dmitry Osipenko
2017-10-03 12:19                             ` Jon Hunter
2017-10-03 12:19                               ` Jon Hunter
2017-10-03 12:19                               ` Jon Hunter
2017-10-03 15:38                         ` Stephen Warren
2017-10-03 17:04                           ` Dmitry Osipenko
     [not found]     ` <604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-10-05 20:33       ` Rob Herring
2017-10-05 20:33         ` Rob Herring
2017-10-05 21:30         ` Dmitry Osipenko
2017-09-25 23:22   ` [PATCH v1 5/5] ARM: dts: tegra: Add AHB DMA controller nodes Dmitry Osipenko
2017-09-25 23:22     ` Dmitry Osipenko
2017-09-28  9:31 ` [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Vinod Koul
2017-09-28 12:24   ` Dmitry Osipenko

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