From: Arnd Bergmann <arnd@arndb.de>
To: Rongrong Zou <zourongrong@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
liviu.dudau@arm.com, Rongrong Zou <zourongrong@huawei.com>,
devicetree@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
Corey Minyard <minyard@acm.org>,
gregkh@linuxfoundation.org, Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 3/3] ARM64 LPC: update binding doc
Date: Wed, 13 Jan 2016 10:26:54 +0100 [thread overview]
Message-ID: <4302652.ztAKMKjFNQ@wuerfel> (raw)
In-Reply-To: <5695F007.3070005@gmail.com>
On Wednesday 13 January 2016 14:34:47 Rongrong Zou wrote:
> On 2016/1/13 13:53, Benjamin Herrenschmidt wrote:
> > On Tue, 2016-01-12 at 23:52 +0100, Arnd Bergmann wrote:
> >> On Tuesday 12 January 2016 15:13:35 liviu.dudau@arm.com wrote:
> >>>> int of_address_to_resource(struct device_node *dev, int index,
> >>>> struct resource *r)
> >>>> {
> >>>> ...
> >>>> /* flags can be get here, without ranges property reqired.
> >>>> * if the reg = <0x0 0xe4 4>, I can get flag of
> >> IORESOURCE_MEM,
> >>>> * if the reg = <0x1 0xe4 4>, I can get flag of
> >> IORESOURCE_IO,
> >>>
> >>> That is strange, the parent node has #address-cells = <2> so the
> >> first two numbers should be part
> >>> of the address and not influence the flags. Can you add some
> >> debugging in of_get_address() and
> >>> try to figure out what bus is used in *flags = bus-
> >>> get_flags(prop) ?
> >>>
> >>>
> >>
> >> This is the standard ISA binding. The first cell is the address space
> >> (IO or MEM), the second cell is the address within that space. This
> >> is similar to how PCI works.
> >
> > Picking up that mid-way, I have LPC busses on power and am using a
> > similar binding. I'll try to grab some examples and review the
> > document tomorrow (only just noticed it while unpiling emails post-
> > vacation).
I really should have thought of that, as you mentioned already that
there is an ast2400 on those machines, and no I/O space on the PCI
bus.
Too bad we have to keep the I/O workarounds alive on PowerPC now,
I was already hoping they could go away after spider-pci gets phased
out.
> Thanks for reviewing this, I found a similar implementation at arch/powerpc/
> platform/powernv/opal-lpc.c and I had get some ideas from your work. It is
> nice to me. I'm expecting your suggestion.Thanks in advance.
Unfortunately, the way that PCI host bridges on PowerPC are handled
is a bit different from what we do on ARM64, otherwise the obvious
solution would be to move the I/O workarounds to an architecture
independent location. Maybe it's still possible, but that also requires
some refactoring then.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: Rongrong Zou <zourongrong-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Benjamin Herrenschmidt
<benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>,
liviu.dudau-5wv7dgnIgG8@public.gmane.org,
Rongrong Zou
<zourongrong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Corey Minyard <minyard-HInyCGIudOg@public.gmane.org>,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v1 3/3] ARM64 LPC: update binding doc
Date: Wed, 13 Jan 2016 10:26:54 +0100 [thread overview]
Message-ID: <4302652.ztAKMKjFNQ@wuerfel> (raw)
In-Reply-To: <5695F007.3070005-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Wednesday 13 January 2016 14:34:47 Rongrong Zou wrote:
> On 2016/1/13 13:53, Benjamin Herrenschmidt wrote:
> > On Tue, 2016-01-12 at 23:52 +0100, Arnd Bergmann wrote:
> >> On Tuesday 12 January 2016 15:13:35 liviu.dudau-5wv7dgnIgG8@public.gmane.org wrote:
> >>>> int of_address_to_resource(struct device_node *dev, int index,
> >>>> struct resource *r)
> >>>> {
> >>>> ...
> >>>> /* flags can be get here, without ranges property reqired.
> >>>> * if the reg = <0x0 0xe4 4>, I can get flag of
> >> IORESOURCE_MEM,
> >>>> * if the reg = <0x1 0xe4 4>, I can get flag of
> >> IORESOURCE_IO,
> >>>
> >>> That is strange, the parent node has #address-cells = <2> so the
> >> first two numbers should be part
> >>> of the address and not influence the flags. Can you add some
> >> debugging in of_get_address() and
> >>> try to figure out what bus is used in *flags = bus-
> >>> get_flags(prop) ?
> >>>
> >>>
> >>
> >> This is the standard ISA binding. The first cell is the address space
> >> (IO or MEM), the second cell is the address within that space. This
> >> is similar to how PCI works.
> >
> > Picking up that mid-way, I have LPC busses on power and am using a
> > similar binding. I'll try to grab some examples and review the
> > document tomorrow (only just noticed it while unpiling emails post-
> > vacation).
I really should have thought of that, as you mentioned already that
there is an ast2400 on those machines, and no I/O space on the PCI
bus.
Too bad we have to keep the I/O workarounds alive on PowerPC now,
I was already hoping they could go away after spider-pci gets phased
out.
> Thanks for reviewing this, I found a similar implementation at arch/powerpc/
> platform/powernv/opal-lpc.c and I had get some ideas from your work. It is
> nice to me. I'm expecting your suggestion.Thanks in advance.
Unfortunately, the way that PCI host bridges on PowerPC are handled
is a bit different from what we do on ARM64, otherwise the obvious
solution would be to move the I/O workarounds to an architecture
independent location. Maybe it's still possible, but that also requires
some refactoring then.
Arnd
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WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 3/3] ARM64 LPC: update binding doc
Date: Wed, 13 Jan 2016 10:26:54 +0100 [thread overview]
Message-ID: <4302652.ztAKMKjFNQ@wuerfel> (raw)
In-Reply-To: <5695F007.3070005@gmail.com>
On Wednesday 13 January 2016 14:34:47 Rongrong Zou wrote:
> On 2016/1/13 13:53, Benjamin Herrenschmidt wrote:
> > On Tue, 2016-01-12 at 23:52 +0100, Arnd Bergmann wrote:
> >> On Tuesday 12 January 2016 15:13:35 liviu.dudau at arm.com wrote:
> >>>> int of_address_to_resource(struct device_node *dev, int index,
> >>>> struct resource *r)
> >>>> {
> >>>> ...
> >>>> /* flags can be get here, without ranges property reqired.
> >>>> * if the reg = <0x0 0xe4 4>, I can get flag of
> >> IORESOURCE_MEM,
> >>>> * if the reg = <0x1 0xe4 4>, I can get flag of
> >> IORESOURCE_IO,
> >>>
> >>> That is strange, the parent node has #address-cells = <2> so the
> >> first two numbers should be part
> >>> of the address and not influence the flags. Can you add some
> >> debugging in of_get_address() and
> >>> try to figure out what bus is used in *flags = bus-
> >>> get_flags(prop) ?
> >>>
> >>>
> >>
> >> This is the standard ISA binding. The first cell is the address space
> >> (IO or MEM), the second cell is the address within that space. This
> >> is similar to how PCI works.
> >
> > Picking up that mid-way, I have LPC busses on power and am using a
> > similar binding. I'll try to grab some examples and review the
> > document tomorrow (only just noticed it while unpiling emails post-
> > vacation).
I really should have thought of that, as you mentioned already that
there is an ast2400 on those machines, and no I/O space on the PCI
bus.
Too bad we have to keep the I/O workarounds alive on PowerPC now,
I was already hoping they could go away after spider-pci gets phased
out.
> Thanks for reviewing this, I found a similar implementation at arch/powerpc/
> platform/powernv/opal-lpc.c and I had get some ideas from your work. It is
> nice to me. I'm expecting your suggestion.Thanks in advance.
Unfortunately, the way that PCI host bridges on PowerPC are handled
is a bit different from what we do on ARM64, otherwise the obvious
solution would be to move the I/O workarounds to an architecture
independent location. Maybe it's still possible, but that also requires
some refactoring then.
Arnd
next prev parent reply other threads:[~2016-01-13 9:27 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-29 13:33 [PATCH v1 0/3] ARM64 LPC: legacy ISA I/O support Rongrong Zou
2015-12-29 13:33 ` [PATCH v1 1/3] ARM64 LPC: indirect ISA PORT IO introduced Rongrong Zou
2015-12-29 13:47 ` Arnd Bergmann
2015-12-29 14:26 ` Rongrong Zou
2015-12-29 14:35 ` Arnd Bergmann
2015-12-30 1:24 ` Rongrong Zou
2015-12-30 8:59 ` Arnd Bergmann
2015-12-30 9:28 ` Rongrong Zou
2015-12-30 9:42 ` Arnd Bergmann
2016-01-04 10:11 ` Will Deacon
2016-01-04 10:27 ` Rongrong Zou
2016-01-04 10:27 ` Rongrong Zou
2015-12-29 13:33 ` [PATCH v1 2/3] ARM64 LPC: LPC driver implementation Rongrong Zou
2015-12-29 13:51 ` Arnd Bergmann
2015-12-29 14:03 ` Rongrong Zou
2015-12-29 14:11 ` Arnd Bergmann
2015-12-29 13:33 ` [PATCH v1 3/3] ARM64 LPC: update binding doc Rongrong Zou
2015-12-29 13:52 ` Arnd Bergmann
2015-12-30 9:06 ` Arnd Bergmann
2015-12-31 14:12 ` Rongrong Zou
2015-12-31 14:12 ` Rongrong Zou
2015-12-31 14:40 ` Arnd Bergmann
[not found] ` <CABTftiT1+AmrNjiAie-T6on-oWA4Zz73+Tj2pQrixMT3o475uw@mail.gmail.com>
2016-01-03 12:24 ` Rongrong Zou
2016-01-03 12:24 ` Rongrong Zou
2016-01-03 12:24 ` Rongrong Zou
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 11:13 ` Arnd Bergmann
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:04 ` Rongrong Zou
2016-01-04 16:34 ` Arnd Bergmann
2016-01-04 16:34 ` Arnd Bergmann
2016-01-04 16:34 ` Arnd Bergmann
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 11:59 ` Rongrong Zou
2016-01-05 12:19 ` Arnd Bergmann
2016-01-05 12:19 ` Arnd Bergmann
2016-01-06 13:36 ` Rongrong Zou
2016-01-06 13:36 ` Rongrong Zou
2016-01-06 13:36 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-07 3:37 ` Rongrong Zou
2016-01-10 9:29 ` Rolland Chau
2016-01-10 9:29 ` Rolland Chau
2016-01-10 13:38 ` Rongrong Zou
2016-01-10 13:38 ` Rongrong Zou
2016-01-10 13:38 ` Rongrong Zou
2016-01-11 16:14 ` liviu.dudau
2016-01-11 16:14 ` liviu.dudau at arm.com
2016-01-11 16:14 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 2:39 ` Rongrong Zou
2016-01-12 2:39 ` Rongrong Zou
2016-01-12 9:07 ` liviu.dudau
2016-01-12 9:07 ` liviu.dudau at arm.com
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 9:25 ` Rongrong Zou
2016-01-12 10:14 ` liviu.dudau
2016-01-12 10:14 ` liviu.dudau at arm.com
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:05 ` Rongrong Zou
2016-01-12 11:27 ` liviu.dudau
2016-01-12 11:27 ` liviu.dudau at arm.com
2016-01-12 11:27 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 11:56 ` Rongrong Zou
2016-01-12 15:13 ` liviu.dudau
2016-01-12 15:13 ` liviu.dudau at arm.com
2016-01-12 15:13 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 22:52 ` Arnd Bergmann
2016-01-12 22:52 ` Arnd Bergmann
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 5:53 ` Benjamin Herrenschmidt
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 6:34 ` Rongrong Zou
2016-01-13 9:26 ` Arnd Bergmann [this message]
2016-01-13 9:26 ` Arnd Bergmann
2016-01-13 9:26 ` Arnd Bergmann
2016-01-13 10:10 ` liviu.dudau
2016-01-13 10:10 ` liviu.dudau at arm.com
2016-01-13 10:10 ` liviu.dudau-5wv7dgnIgG8
2016-01-13 10:18 ` Arnd Bergmann
2016-01-13 10:18 ` Arnd Bergmann
2016-01-13 10:32 ` liviu.dudau
2016-01-13 10:32 ` liviu.dudau at arm.com
2016-01-13 10:32 ` liviu.dudau-5wv7dgnIgG8
2016-01-12 22:54 ` Arnd Bergmann
2016-01-12 22:54 ` Arnd Bergmann
2016-01-13 10:09 ` liviu.dudau
2016-01-13 10:09 ` liviu.dudau at arm.com
2016-01-13 10:09 ` liviu.dudau-5wv7dgnIgG8
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 10:29 ` Arnd Bergmann
2016-01-13 11:06 ` Rongrong Zou
2016-01-13 11:06 ` Rongrong Zou
2016-01-13 11:25 ` liviu.dudau
2016-01-13 11:25 ` liviu.dudau at arm.com
2016-01-13 23:29 ` Benjamin Herrenschmidt
2016-01-14 2:03 ` Rongrong Zou
2016-01-14 3:39 ` Benjamin Herrenschmidt
2016-01-14 4:42 ` Rongrong Zou
2016-01-14 11:25 ` Benjamin Herrenschmidt
2016-01-14 13:11 ` Rongrong Zou
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