From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v1 08/25] dt-bindings: clock: mt8173: Add dummy clock ID Date: Fri, 23 Dec 2022 10:26:35 +0100 [thread overview] Message-ID: <46edd627-c128-b979-823f-0a94fe9d425b@linaro.org> (raw) In-Reply-To: <960b0707-f0e5-993b-3706-a7a275e0698f@collabora.com> On 23/12/2022 10:21, AngeloGioacchino Del Regno wrote: > Il 23/12/22 09:52, Krzysztof Kozlowski ha scritto: >> On 22/12/2022 12:48, AngeloGioacchino Del Regno wrote: >>> Some old MediaTek clock drivers are starting the clock count (so, the >>> clock ID) from one instead of zero and this is logically incorrect, >>> as we should start from 0. >>> During a cleanup an issue emerged due to that and the cleanest and >>> shortest way to keep devicetree backwards compatibility while still >>> performing the well deserved cleanup is to add a dummy clock where >>> needed, with ID 0. >> >> Unfortunately I do not understand at all why adding dummy (fake) ID >> cleans anything here. Unifying IDs to start from 0 is not an argument on >> DT bindings header IDs. >> >> Best regards, >> Krzysztof >> >> > > All clocks are in one or multiple arrays, and if we don't register ID 0, > devicetrees will reference the wrong clock, as the IDs will shift back by > one during registration. So what stops you to register some 0-dummy clock? Why do you need a binding for it? > This was done for a commonization of probe() and remove() callbacks for > MediaTek clock drivers... since we have 3 affected SoCs (MT8173, MT2701 > and MT6779) out of *19* (soon 20), to me, it didn't make sense to write > commonized code to address this just because of 3 out of 20 SoCs (note > that each SoC has around 4 clock drivers). > > Any suggestion to keep this one short, while not touching dt-bindings? Just add a clock or better empty entry in your table, without touching bindings. Best regards, Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v1 08/25] dt-bindings: clock: mt8173: Add dummy clock ID Date: Fri, 23 Dec 2022 10:26:35 +0100 [thread overview] Message-ID: <46edd627-c128-b979-823f-0a94fe9d425b@linaro.org> (raw) In-Reply-To: <960b0707-f0e5-993b-3706-a7a275e0698f@collabora.com> On 23/12/2022 10:21, AngeloGioacchino Del Regno wrote: > Il 23/12/22 09:52, Krzysztof Kozlowski ha scritto: >> On 22/12/2022 12:48, AngeloGioacchino Del Regno wrote: >>> Some old MediaTek clock drivers are starting the clock count (so, the >>> clock ID) from one instead of zero and this is logically incorrect, >>> as we should start from 0. >>> During a cleanup an issue emerged due to that and the cleanest and >>> shortest way to keep devicetree backwards compatibility while still >>> performing the well deserved cleanup is to add a dummy clock where >>> needed, with ID 0. >> >> Unfortunately I do not understand at all why adding dummy (fake) ID >> cleans anything here. Unifying IDs to start from 0 is not an argument on >> DT bindings header IDs. >> >> Best regards, >> Krzysztof >> >> > > All clocks are in one or multiple arrays, and if we don't register ID 0, > devicetrees will reference the wrong clock, as the IDs will shift back by > one during registration. So what stops you to register some 0-dummy clock? Why do you need a binding for it? > This was done for a commonization of probe() and remove() callbacks for > MediaTek clock drivers... since we have 3 affected SoCs (MT8173, MT2701 > and MT6779) out of *19* (soon 20), to me, it didn't make sense to write > commonized code to address this just because of 3 out of 20 SoCs (note > that each SoC has around 4 clock drivers). > > Any suggestion to keep this one short, while not touching dt-bindings? Just add a clock or better empty entry in your table, without touching bindings. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-12-23 9:26 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-22 11:48 [PATCH v1 00/25] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 01/25] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 02/25] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 03/25] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 04/25] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 05/25] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 06/25] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 07/25] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 08/25] dt-bindings: clock: mt8173: Add dummy clock ID AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-23 8:52 ` Krzysztof Kozlowski 2022-12-23 8:52 ` Krzysztof Kozlowski 2022-12-23 9:21 ` AngeloGioacchino Del Regno 2022-12-23 9:21 ` AngeloGioacchino Del Regno 2022-12-23 9:26 ` Krzysztof Kozlowski [this message] 2022-12-23 9:26 ` Krzysztof Kozlowski 2022-12-23 9:28 ` AngeloGioacchino Del Regno 2022-12-23 9:28 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 09/25] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 10/25] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 11/25] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 12/25] dt-bindings: clock: mt2701/mt6779: Add dummy clock with ID 0 AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 13/25] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 14/25] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 15/25] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 16/25] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 17/25] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 18/25] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 19/25] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 20/25] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 21/25] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 22/25] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 23/25] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 24/25] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno 2022-12-22 11:48 ` [PATCH v1 25/25] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-22 11:48 ` AngeloGioacchino Del Regno
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