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From: Ryan Mallon <ryan@bluewatersys.com>
To: Hong Xu <hong.xu@atmel.com>
Cc: linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, jamie@jamieiles.com,
	jacmet@sunsite.dk, nicolas.ferre@atmel.com
Subject: Re: [PATCH] MTD: atmel_nand: Add DMA support to access Nandflash
Date: Tue, 18 Jan 2011 11:42:07 +1300	[thread overview]
Message-ID: <4D34C5BF.2070107@bluewatersys.com> (raw)
In-Reply-To: <4D34A37E.1060300@bluewatersys.com>

On 01/18/2011 09:15 AM, Ryan Mallon wrote:
> On 01/17/2011 08:20 PM, Hong Xu wrote:
>> Some SAM9 chips have the ability to perform DMA between CPU and SMC controller.
>> This patch adds DMA support for SAM9RL, SAM9G45, SSAM9G46,AM9M10, SAM9M11.

I'm trying to patch this into a 2.6.33 kernel running on a custom
SAM9G45 based board, but I get a failure requesting the DMA channel:

root@snapper:~$ dmesg | grep -i dma
[    0.850000] atmel_nand atmel_nand: Failed to request DMA channel
[    0.860000] atmel_nand atmel_nand: No DMA support for NAND access.
[    1.530000] at_hdmac at_hdmac: Atmel AHB DMA Controller ( cpy slave ), 8 channels


It looks like the registration for the DMA controller happens after the
NAND driver probe and so the request is failing. I had a quick look, but
I can't see anything that would change this in more recent kernels. Any
ideas?

Also, I think you want to add the following for the atmel_nand Kconfig:
  select AT_HDMAC

or make the DMA parts of the driver ifdef CONFIG_AT_HDMAC (if the above
won't work for some reason) since you will get build errors on the
dmaengine functions otherwise.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan@bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751 
Fax:   +64 3 3779135			  USA 1800 261 2934


WARNING: multiple messages have this Message-ID (diff)
From: Ryan Mallon <ryan@bluewatersys.com>
To: Hong Xu <hong.xu@atmel.com>
Cc: nicolas.ferre@atmel.com, linux-kernel@vger.kernel.org,
	linux-mtd@lists.infradead.org, jamie@jamieiles.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] MTD: atmel_nand: Add DMA support to access Nandflash
Date: Tue, 18 Jan 2011 11:42:07 +1300	[thread overview]
Message-ID: <4D34C5BF.2070107@bluewatersys.com> (raw)
In-Reply-To: <4D34A37E.1060300@bluewatersys.com>

On 01/18/2011 09:15 AM, Ryan Mallon wrote:
> On 01/17/2011 08:20 PM, Hong Xu wrote:
>> Some SAM9 chips have the ability to perform DMA between CPU and SMC controller.
>> This patch adds DMA support for SAM9RL, SAM9G45, SSAM9G46,AM9M10, SAM9M11.

I'm trying to patch this into a 2.6.33 kernel running on a custom
SAM9G45 based board, but I get a failure requesting the DMA channel:

root@snapper:~$ dmesg | grep -i dma
[    0.850000] atmel_nand atmel_nand: Failed to request DMA channel
[    0.860000] atmel_nand atmel_nand: No DMA support for NAND access.
[    1.530000] at_hdmac at_hdmac: Atmel AHB DMA Controller ( cpy slave ), 8 channels


It looks like the registration for the DMA controller happens after the
NAND driver probe and so the request is failing. I had a quick look, but
I can't see anything that would change this in more recent kernels. Any
ideas?

Also, I think you want to add the following for the atmel_nand Kconfig:
  select AT_HDMAC

or make the DMA parts of the driver ifdef CONFIG_AT_HDMAC (if the above
won't work for some reason) since you will get build errors on the
dmaengine functions otherwise.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan@bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751 
Fax:   +64 3 3779135			  USA 1800 261 2934

WARNING: multiple messages have this Message-ID (diff)
From: ryan@bluewatersys.com (Ryan Mallon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] MTD: atmel_nand: Add DMA support to access Nandflash
Date: Tue, 18 Jan 2011 11:42:07 +1300	[thread overview]
Message-ID: <4D34C5BF.2070107@bluewatersys.com> (raw)
In-Reply-To: <4D34A37E.1060300@bluewatersys.com>

On 01/18/2011 09:15 AM, Ryan Mallon wrote:
> On 01/17/2011 08:20 PM, Hong Xu wrote:
>> Some SAM9 chips have the ability to perform DMA between CPU and SMC controller.
>> This patch adds DMA support for SAM9RL, SAM9G45, SSAM9G46,AM9M10, SAM9M11.

I'm trying to patch this into a 2.6.33 kernel running on a custom
SAM9G45 based board, but I get a failure requesting the DMA channel:

root at snapper:~$ dmesg | grep -i dma
[    0.850000] atmel_nand atmel_nand: Failed to request DMA channel
[    0.860000] atmel_nand atmel_nand: No DMA support for NAND access.
[    1.530000] at_hdmac at_hdmac: Atmel AHB DMA Controller ( cpy slave ), 8 channels


It looks like the registration for the DMA controller happens after the
NAND driver probe and so the request is failing. I had a quick look, but
I can't see anything that would change this in more recent kernels. Any
ideas?

Also, I think you want to add the following for the atmel_nand Kconfig:
  select AT_HDMAC

or make the DMA parts of the driver ifdef CONFIG_AT_HDMAC (if the above
won't work for some reason) since you will get build errors on the
dmaengine functions otherwise.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751 
Fax:   +64 3 3779135			  USA 1800 261 2934

  reply	other threads:[~2011-01-17 22:41 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <hong.xu@atmel.com>
2011-01-17  7:20 ` [PATCH] MTD: atmel_nand: Add DMA support to access Nandflash Hong Xu
2011-07-08 16:43   ` Hong Xu
2011-01-17  7:20   ` Hong Xu
2011-01-17 20:15   ` Ryan Mallon
2011-01-17 20:15     ` Ryan Mallon
2011-01-17 20:15     ` Ryan Mallon
2011-01-17 22:42     ` Ryan Mallon [this message]
2011-01-17 22:42       ` Ryan Mallon
2011-01-17 22:42       ` Ryan Mallon
2011-01-18  1:43       ` Xu, Hong
2011-01-18  1:43         ` Xu, Hong
2011-01-18  1:43         ` Xu, Hong
2011-01-18  2:44         ` Ryan Mallon
2011-01-18  2:44           ` Ryan Mallon
2011-01-18  2:44           ` Ryan Mallon
2011-01-17 21:35   ` Ryan Mallon
2011-01-17 21:35     ` Ryan Mallon
2011-01-17 21:35     ` Ryan Mallon
2011-01-18  2:56 ` Hong Xu
2011-07-08 17:32   ` Hong Xu
2011-01-18  2:56   ` Hong Xu
2011-01-18  3:08   ` Ryan Mallon
2011-01-18  3:08     ` Ryan Mallon
2011-01-18  3:08     ` Ryan Mallon
2011-01-18  6:17     ` 答复: " Xu, Hong
2011-01-18  6:36 Hong Xu
2011-01-18  6:36 ` Hong Xu
2011-01-18  6:36 ` Hong Xu
2011-01-18  9:06 ` Ryan Mallon
2011-07-08 15:36   ` Ryan Mallon
2011-01-18  9:06   ` Ryan Mallon
2011-01-21 11:23 ` Artem Bityutskiy
2011-01-21 11:23   ` Artem Bityutskiy
2011-01-21 11:23   ` Artem Bityutskiy
  -- strict thread matches above, loose matches on Subject: below --
2011-01-18  3:02 Hong Xu
2011-01-18  3:02 ` Hong Xu
2011-01-18  3:02 ` Hong Xu
2011-01-14  9:34 Hong Xu
2011-01-14  9:34 ` Hong Xu
2011-01-14  9:34 ` Hong Xu
2011-01-14 10:00 ` Jamie Iles
2011-01-14 10:00   ` Jamie Iles
2011-01-14 10:00   ` Jamie Iles
2011-01-14 11:43 ` Peter Korsgaard
2011-01-14 11:43   ` Peter Korsgaard
2011-01-14 11:43   ` Peter Korsgaard

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