All of lore.kernel.org
 help / color / mirror / Atom feed
From: Adrian Hunter <adrian.hunter@intel.com>
To: Aaron Brice <aaron.brice@datasoft.com>,
	ulf.hansson@linaro.org, aisheng.dong@nxp.com
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Dave Russell <david.russell@datasoft.com>
Subject: Re: [PATCH v2] sdhci-esdhc-imx: Correct two register accesses
Date: Tue, 11 Oct 2016 12:18:20 +0300	[thread overview]
Message-ID: <4e944cda-05c6-0515-c98d-e90600f63541@intel.com> (raw)
In-Reply-To: <1476124792-18441-1-git-send-email-aaron.brice@datasoft.com>

On 10/10/16 21:39, Aaron Brice wrote:
>  - The DMA error interrupt bit is in a different position as
>    compared to the sdhci standard.  This is accounted for in
>    many cases, but not handled in the case of clearing the
>    INT_STATUS register by writing a 1 to that location.
>  - The HOST_CONTROL register is very different as compared to
>    the sdhci standard.  This is accounted for in the write
>    case, but not when read back out (which it is in the sdhci
>    code).
> 
> Signed-off-by: Dave Russell <david.russell@datasoft.com>
> Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
> Acked-by: Dong Aisheng <aisheng.dong@nxp.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

WARNING: multiple messages have this Message-ID (diff)
From: adrian.hunter@intel.com (Adrian Hunter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] sdhci-esdhc-imx: Correct two register accesses
Date: Tue, 11 Oct 2016 12:18:20 +0300	[thread overview]
Message-ID: <4e944cda-05c6-0515-c98d-e90600f63541@intel.com> (raw)
In-Reply-To: <1476124792-18441-1-git-send-email-aaron.brice@datasoft.com>

On 10/10/16 21:39, Aaron Brice wrote:
>  - The DMA error interrupt bit is in a different position as
>    compared to the sdhci standard.  This is accounted for in
>    many cases, but not handled in the case of clearing the
>    INT_STATUS register by writing a 1 to that location.
>  - The HOST_CONTROL register is very different as compared to
>    the sdhci standard.  This is accounted for in the write
>    case, but not when read back out (which it is in the sdhci
>    code).
> 
> Signed-off-by: Dave Russell <david.russell@datasoft.com>
> Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
> Acked-by: Dong Aisheng <aisheng.dong@nxp.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

  reply	other threads:[~2016-10-11  9:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-10 18:39 [PATCH v2] sdhci-esdhc-imx: Correct two register accesses Aaron Brice
2016-10-10 18:39 ` Aaron Brice
2016-10-11  9:18 ` Adrian Hunter [this message]
2016-10-11  9:18   ` Adrian Hunter
2016-10-13  7:01 ` Ulf Hansson
2016-10-13  7:01   ` Ulf Hansson
2016-10-13  7:01   ` Ulf Hansson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4e944cda-05c6-0515-c98d-e90600f63541@intel.com \
    --to=adrian.hunter@intel.com \
    --cc=aaron.brice@datasoft.com \
    --cc=aisheng.dong@nxp.com \
    --cc=david.russell@datasoft.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.