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From: Andy Yan <andy.yan@rock-chips.com>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: airlied@linux.ie, heiko@sntech.de, fabio.estevam@freescale.com,
	rmk+kernel@arm.linux.org.uk,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Grant Likely <grant.likely@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Shawn Guo <shawn.guo@linaro.org>, Josh Boyer <jwboyer@redhat.com>,
	Sean Paul <seanpaul@chromium.org>,
	Inki Dae <inki.dae@samsung.com>, Dave Airlie <airlied@redhat.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Lucas Stach <l.stach@pengutronix.de>,
	Zubair.Kakakhel@imgtec.com, djkurtz@google.com,
	ykk@rock-chips.com, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, devel@driverdev.osuosl.org,
	devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
	jay.xu@rock-chips.com, Pawel Moll <pawel.moll@arm.com>,
	mark.yao@rock-chips.com, Mark Rutland <mark.rutland@arm.com>,
	vladimir_zapolskiy@mentor.com,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>
Subject: Re: [PATCH v15 12/12] drm: bridge/dw_hdmi: add rockchip rk3288 support
Date: Tue, 02 Dec 2014 20:34:53 +0800	[thread overview]
Message-ID: <547DB1ED.7000409@rock-chips.com> (raw)
In-Reply-To: <1417515882.3411.8.camel@pengutronix.de>

Hi Philipp:
On 2014年12月02日 18:24, Philipp Zabel wrote:
> Hi Andy,
>
> Am Dienstag, den 02.12.2014, 15:45 +0800 schrieb Andy Yan:
> [...]
>> +static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
>> +				 void *data)
>> +{
>> +	struct platform_device *pdev = to_platform_device(dev);
>> +	const struct dw_hdmi_plat_data *plat_data;
>> +	const struct of_device_id *match;
>> +	struct drm_device *drm = data;
>> +	struct drm_encoder *encoder;
>> +	struct rockchip_hdmi *hdmi;
>> +	int ret;
>> +
>> +	if (!pdev->dev.of_node)
>> +		return -ENODEV;
>> +
>> +	hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
>> +	if (!hdmi)
>> +		return -ENOMEM;
>> +
>> +	match = of_match_node(dw_hdmi_rockchip_ids, pdev->dev.of_node);
>> +	plat_data = match->data;
>> +	hdmi->dev = &pdev->dev;
>> +	encoder = &hdmi->encoder;
>> +	platform_set_drvdata(pdev, hdmi);
>> +
>> +	ret = rockchip_hdmi_parse_dt(hdmi);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Unable to parse OF data\n");
>> +		return ret;
>> +	}
>> +
>> +	ret = clk_prepare_enable(hdmi->clk);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Cannot enable HDMI clock: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = clk_prepare_enable(hdmi->hdcp_clk);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Cannot enable HDMI hdcp clock: %d\n", ret);
>> +		return ret;
>> +	}
> Could we have a look at the clocks again? Basically the Rockchip clock
> handling is exactly the same, except the clocks are called by other
> names.
>
> On i.MX6, according to the reference manual, the HDMI TX module has four
> clock inputs: "iahbclk" (bus clock), "icecclk" (32 kHz CEC clock),
> "ihclk" (module clock), and "isfrclk" (27 MHz internal SFR clock).
> The "iahbclk" and "ihclk" are both sourced from the SoC AHB root clock,
> the 32 kHz reference input can't be gated, and the "isfrclk" has its own
> gate.
>
> Does the HDMI TX implementation on Rockchip still have the separate
> external sfr bus and module clock inputs? I assume that your "clk" input
> is a single gate bit for bus and module clocks at the same time?
> If possible, I'd prefer to find a common binding for the clocks with
> some of the clocks being optional, but for that we need to know the
> actual clock inputs to the HDMI TX module.
>
> regards
> Philipp
>
     There are three  individual clock inputs on Rockchip RK3288 HDMI: 
"hdmi_ctrl_clk",
     "hdmi_cec_clk", "hdmi_hdcp_clk", the three clocks are responsible 
for different
      functions as their name described, and have their own private gate 
bit. That is
      to say, the cec_clk and hdcp_clk can all be disabled if we don't 
need hdcp and cec
      function.
      So I think it's better to make the clk control platform independent.

     Heiko, do you have any suggestions?
>
>



WARNING: multiple messages have this Message-ID (diff)
From: Andy Yan <andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: airlied-cv59FeDIM0c@public.gmane.org,
	heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org,
	fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
	rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
	Greg Kroah-Hartman
	<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
	Grant Likely
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Josh Boyer <jwboyer-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Inki Dae <inki.dae-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Dave Airlie <airlied-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
	Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Zubair.Kakakhel-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org,
	djkurtz-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	devel-gWbeCf7V1WCQmaza687I9mD2FQJk+8+b@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	vladimir_zapolskiy-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Kuma
Subject: Re: [PATCH v15 12/12] drm: bridge/dw_hdmi: add rockchip rk3288 support
Date: Tue, 02 Dec 2014 20:34:53 +0800	[thread overview]
Message-ID: <547DB1ED.7000409@rock-chips.com> (raw)
In-Reply-To: <1417515882.3411.8.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

Hi Philipp:
On 2014年12月02日 18:24, Philipp Zabel wrote:
> Hi Andy,
>
> Am Dienstag, den 02.12.2014, 15:45 +0800 schrieb Andy Yan:
> [...]
>> +static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
>> +				 void *data)
>> +{
>> +	struct platform_device *pdev = to_platform_device(dev);
>> +	const struct dw_hdmi_plat_data *plat_data;
>> +	const struct of_device_id *match;
>> +	struct drm_device *drm = data;
>> +	struct drm_encoder *encoder;
>> +	struct rockchip_hdmi *hdmi;
>> +	int ret;
>> +
>> +	if (!pdev->dev.of_node)
>> +		return -ENODEV;
>> +
>> +	hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
>> +	if (!hdmi)
>> +		return -ENOMEM;
>> +
>> +	match = of_match_node(dw_hdmi_rockchip_ids, pdev->dev.of_node);
>> +	plat_data = match->data;
>> +	hdmi->dev = &pdev->dev;
>> +	encoder = &hdmi->encoder;
>> +	platform_set_drvdata(pdev, hdmi);
>> +
>> +	ret = rockchip_hdmi_parse_dt(hdmi);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Unable to parse OF data\n");
>> +		return ret;
>> +	}
>> +
>> +	ret = clk_prepare_enable(hdmi->clk);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Cannot enable HDMI clock: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = clk_prepare_enable(hdmi->hdcp_clk);
>> +	if (ret) {
>> +		dev_err(hdmi->dev, "Cannot enable HDMI hdcp clock: %d\n", ret);
>> +		return ret;
>> +	}
> Could we have a look at the clocks again? Basically the Rockchip clock
> handling is exactly the same, except the clocks are called by other
> names.
>
> On i.MX6, according to the reference manual, the HDMI TX module has four
> clock inputs: "iahbclk" (bus clock), "icecclk" (32 kHz CEC clock),
> "ihclk" (module clock), and "isfrclk" (27 MHz internal SFR clock).
> The "iahbclk" and "ihclk" are both sourced from the SoC AHB root clock,
> the 32 kHz reference input can't be gated, and the "isfrclk" has its own
> gate.
>
> Does the HDMI TX implementation on Rockchip still have the separate
> external sfr bus and module clock inputs? I assume that your "clk" input
> is a single gate bit for bus and module clocks at the same time?
> If possible, I'd prefer to find a common binding for the clocks with
> some of the clocks being optional, but for that we need to know the
> actual clock inputs to the HDMI TX module.
>
> regards
> Philipp
>
     There are three  individual clock inputs on Rockchip RK3288 HDMI: 
"hdmi_ctrl_clk",
     "hdmi_cec_clk", "hdmi_hdcp_clk", the three clocks are responsible 
for different
      functions as their name described, and have their own private gate 
bit. That is
      to say, the cec_clk and hdcp_clk can all be disabled if we don't 
need hdcp and cec
      function.
      So I think it's better to make the clk control platform independent.

     Heiko, do you have any suggestions?
>
>


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  reply	other threads:[~2014-12-02 12:35 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-02  7:36 [PATCH v15 0/12] dw-hdmi: convert imx hdmi to bridge/dw_hdmi Andy Yan
2014-12-02  7:36 ` Andy Yan
2014-12-02  7:38 ` [PATCH v15 01/12] drm: imx: imx-hdmi: make checkpatch happy Andy Yan
2014-12-02  7:38   ` Andy Yan
2014-12-02  7:39 ` [PATCH v15 02/12] drm: imx: imx-hdmi: return defer if can't get ddc i2c adapter Andy Yan
2014-12-02  7:39   ` Andy Yan
2014-12-02  7:39 ` [PATCH v15 03/12] drm: imx: imx-hdmi: convert imx-hdmi to drm_bridge mode Andy Yan
2014-12-02  7:39   ` Andy Yan
2014-12-02  7:40 ` [PATCH v15 04/12] drm: imx: imx-hdmi: split phy configuration to platform driver Andy Yan
2014-12-02  7:40   ` Andy Yan
2014-12-02  7:41 ` [PATCH v15 05/12] drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi Andy Yan
2014-12-02  7:41   ` Andy Yan
2014-12-02  7:42 ` [PATCH v15 06/12] dt-bindings: add document for dw_hdmi Andy Yan
2014-12-02  7:42   ` Andy Yan
2014-12-02 18:23   ` Philipp Zabel
2014-12-02 18:23     ` Philipp Zabel
2014-12-03  0:54     ` Andy Yan
2014-12-03  0:54       ` Andy Yan
2014-12-03  9:19       ` Philipp Zabel
2014-12-03  9:19         ` Philipp Zabel
2014-12-03  9:43         ` Andy Yan
2014-12-03  9:43           ` Andy Yan
2014-12-03  9:46     ` Andy Yan
2014-12-03  9:46       ` Andy Yan
2014-12-03 11:52       ` Philipp Zabel
2014-12-03 11:52         ` Philipp Zabel
2014-12-03 11:58         ` Andy Yan
2014-12-03 11:58           ` Andy Yan
2014-12-02  7:42 ` [PATCH v15 07/12] drm: bridge/dw_hdmi: add support for multi-byte register width access Andy Yan
2014-12-02  7:43 ` [PATCH v15 08/12] drm: bridge/dw_hdmi: add mode_valid support Andy Yan
2014-12-02  7:43   ` Andy Yan
2014-12-02  7:43 ` [PATCH v15 09/12] drm: bridge/dw_hdmi: clear i2cmphy_stat0 reg in hdmi_phy_wait_i2c_done Andy Yan
2014-12-02  7:43   ` Andy Yan
2014-12-02  7:44 ` [PATCH v15 10/12] drm: bridge/dw_hdmi: add function dw_hdmi_phy_enable_spare Andy Yan
2014-12-02  7:44   ` Andy Yan
2014-12-02  7:44 ` [PATCH v15 11/12] dt-bindings: Add documentation for rockchip dw hdmi Andy Yan
2014-12-02  7:44   ` Andy Yan
2014-12-02  7:45 ` [PATCH v15 12/12] drm: bridge/dw_hdmi: add rockchip rk3288 support Andy Yan
2014-12-02  7:45   ` Andy Yan
2014-12-02 10:24   ` Philipp Zabel
2014-12-02 10:24     ` Philipp Zabel
2014-12-02 12:34     ` Andy Yan [this message]
2014-12-02 12:34       ` Andy Yan
2014-12-02 13:00       ` Philipp Zabel
2014-12-02 13:00         ` Philipp Zabel
2014-12-03 12:32         ` Andy Yan
2014-12-03 12:32           ` Andy Yan
2014-12-03 13:09           ` Philipp Zabel
2014-12-03 13:09             ` Philipp Zabel
2014-12-03 13:20             ` Andy Yan
2014-12-03 13:20               ` Andy Yan

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