From: Jason-JH Lin <jason-jh.lin@mediatek.com> To: CK Hu <ck.hu@mediatek.com>, Rob Herring <robh+dt@kernel.org>, "Matthias Brugger" <matthias.bgg@gmail.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: devicetree@vger.kernel.org, Jitao shi <jitao.shi@mediatek.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, David Airlie <airlied@linux.ie>, linux-kernel@vger.kernel.org, singo.chang@mediatek.com, Alexandre Torgue <alexandre.torgue@foss.st.com>, roy-cw.yeh@mediatek.com, Fabien Parent <fparent@baylibre.com>, moudy.ho@mediatek.com, linux-mediatek@lists.infradead.org, Daniel Vetter <daniel@ffwll.ch>, hsinyi@chromium.org, Enric Balletbo i Serra <enric.balletbo@collabora.com>, nancy.lin@mediatek.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v14 08/12] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 Date: Wed, 26 Jan 2022 12:18:09 +0800 [thread overview] Message-ID: <54aa0b9c88cf421eb382def79f3e06ef93d33c02.camel@mediatek.com> (raw) In-Reply-To: <72aa6c751db15e4aac813247c309fae622180056.camel@mediatek.com> Hi CK, Thanks for the reviews. On Tue, 2022-01-25 at 11:44 +0800, CK Hu wrote: > Hi, Jason: > > On Fri, 2022-01-07 at 18:14 +0800, jason-jh.lin wrote: > > Add mt8195 vdosys0 clock driver name and routing table to > > the driver data of mtk-mmsys. > > > > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> > > Acked-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > The vdosys1 impelmentation patch [1] will be dependened on this > > patch. > > [1] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 > > - > > https://patchwork.kernel.org/project/linux-mediatek/patch/20211208024426.15595-6-nancy.lin@mediatek.com/ > > --- > > drivers/soc/mediatek/mt8195-mmsys.h | 220 > > +++++++++++++++++++++++++ > > drivers/soc/mediatek/mtk-mmsys.c | 11 ++ > > include/linux/soc/mediatek/mtk-mmsys.h | 9 + > > 3 files changed, 240 insertions(+) > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h > > > > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h > > b/drivers/soc/mediatek/mt8195-mmsys.h > > new file mode 100644 > > index 000000000000..e04cabdfa2dc > > --- /dev/null > > +++ b/drivers/soc/mediatek/mt8195-mmsys.h > > @@ -0,0 +1,220 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > + > > +#ifndef __SOC_MEDIATEK_MT8195_MMSYS_H > > +#define __SOC_MEDIATEK_MT8195_MMSYS_H > > + > > +#define MT8195_VDO0_OVL_MOUT_EN > > 0xf14 > > +/* > > + * MT8195_VDO0_OVL_MOUT[2:0]: DISP_OVL0 > > + * BIT(0) : DISP_RDMA0 > > + * BIT(1) : DISP_WDMA0 > > + * BIT(2): DISP_OVL1 > > I think these information is not necessary because we could get these > information from mmsys_mt8195_routing_table[]. > > Regards, > CK > These comments was suggest by Fei at: https://patchwork.kernel.org/project/linux-mediatek/patch/20210921155218.10387-10-jason-jh.lin@mediatek.com/#24546317 I've discussed with him that removing these information is fine. So' I'll remove it at the next version. > > + */ > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 > > BIT(0) > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0 > > BIT(1) > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1 BIT(2) > > +/* > > + * MT8195_VDO0_OVL_MOUT[6:4]: DISP_OVL1 > > + * BIT(0) : DISP_RDMA1 > > + * BIT(1) : DISP_WDMA1 > > + * BIT(2): DISP_OVL0 > > + */ > > > > [snip] > > > + > > +static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] > > = > > { > > + { > > + DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, > > + MT8195_VDO0_OVL_MOUT_EN, > > MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0, > > + MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 > > + }, { > > + DDP_COMPONENT_OVL1, DDP_COMPONENT_RDMA1, > > + MT8195_VDO0_OVL_MOUT_EN, > > MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1, > > + MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT, > Why this mask MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT is 0? > > + MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT > > + }, { > > + DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, > > + MT8195_VDO0_SEL_IN, > Why this mask MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE is 0? > > + MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0, > > + MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT, > Why this mask MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 is 0? > Regards, > CK I'll fix the 0 mask problem with the define of GENMASK(h, l) for each mux settings. Regards, Jason-JH.Lin > > + MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0, > > + MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0 > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0, > > + MT8195_VDO0_SEL_OUT, > > MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN, > > + MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_DSI0, > > + MT8195_SOUT_DISP_DITHER0_TO_DSI0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0, > > + MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, > > + MT8195_VDO0_SEL_OUT, > > MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE, > > + MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE > > + }, { > > + DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_DP_INTF0, > > + MT8195_SOUT_VPP_MERGE_TO_DP_INTF0 > > + } > > +}; > > + > > -- Jason-JH Lin <jason-jh.lin@mediatek.com> _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Jason-JH Lin <jason-jh.lin@mediatek.com> To: CK Hu <ck.hu@mediatek.com>, Rob Herring <robh+dt@kernel.org>, "Matthias Brugger" <matthias.bgg@gmail.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: devicetree@vger.kernel.org, Jitao shi <jitao.shi@mediatek.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, David Airlie <airlied@linux.ie>, linux-kernel@vger.kernel.org, singo.chang@mediatek.com, Alexandre Torgue <alexandre.torgue@foss.st.com>, roy-cw.yeh@mediatek.com, Fabien Parent <fparent@baylibre.com>, moudy.ho@mediatek.com, linux-mediatek@lists.infradead.org, Daniel Vetter <daniel@ffwll.ch>, hsinyi@chromium.org, Enric Balletbo i Serra <enric.balletbo@collabora.com>, nancy.lin@mediatek.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v14 08/12] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 Date: Wed, 26 Jan 2022 12:18:09 +0800 [thread overview] Message-ID: <54aa0b9c88cf421eb382def79f3e06ef93d33c02.camel@mediatek.com> (raw) In-Reply-To: <72aa6c751db15e4aac813247c309fae622180056.camel@mediatek.com> Hi CK, Thanks for the reviews. On Tue, 2022-01-25 at 11:44 +0800, CK Hu wrote: > Hi, Jason: > > On Fri, 2022-01-07 at 18:14 +0800, jason-jh.lin wrote: > > Add mt8195 vdosys0 clock driver name and routing table to > > the driver data of mtk-mmsys. > > > > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> > > Acked-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > The vdosys1 impelmentation patch [1] will be dependened on this > > patch. > > [1] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 > > - > > https://patchwork.kernel.org/project/linux-mediatek/patch/20211208024426.15595-6-nancy.lin@mediatek.com/ > > --- > > drivers/soc/mediatek/mt8195-mmsys.h | 220 > > +++++++++++++++++++++++++ > > drivers/soc/mediatek/mtk-mmsys.c | 11 ++ > > include/linux/soc/mediatek/mtk-mmsys.h | 9 + > > 3 files changed, 240 insertions(+) > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h > > > > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h > > b/drivers/soc/mediatek/mt8195-mmsys.h > > new file mode 100644 > > index 000000000000..e04cabdfa2dc > > --- /dev/null > > +++ b/drivers/soc/mediatek/mt8195-mmsys.h > > @@ -0,0 +1,220 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > + > > +#ifndef __SOC_MEDIATEK_MT8195_MMSYS_H > > +#define __SOC_MEDIATEK_MT8195_MMSYS_H > > + > > +#define MT8195_VDO0_OVL_MOUT_EN > > 0xf14 > > +/* > > + * MT8195_VDO0_OVL_MOUT[2:0]: DISP_OVL0 > > + * BIT(0) : DISP_RDMA0 > > + * BIT(1) : DISP_WDMA0 > > + * BIT(2): DISP_OVL1 > > I think these information is not necessary because we could get these > information from mmsys_mt8195_routing_table[]. > > Regards, > CK > These comments was suggest by Fei at: https://patchwork.kernel.org/project/linux-mediatek/patch/20210921155218.10387-10-jason-jh.lin@mediatek.com/#24546317 I've discussed with him that removing these information is fine. So' I'll remove it at the next version. > > + */ > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 > > BIT(0) > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0 > > BIT(1) > > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1 BIT(2) > > +/* > > + * MT8195_VDO0_OVL_MOUT[6:4]: DISP_OVL1 > > + * BIT(0) : DISP_RDMA1 > > + * BIT(1) : DISP_WDMA1 > > + * BIT(2): DISP_OVL0 > > + */ > > > > [snip] > > > + > > +static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] > > = > > { > > + { > > + DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, > > + MT8195_VDO0_OVL_MOUT_EN, > > MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0, > > + MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 > > + }, { > > + DDP_COMPONENT_OVL1, DDP_COMPONENT_RDMA1, > > + MT8195_VDO0_OVL_MOUT_EN, > > MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1, > > + MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT, > Why this mask MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT is 0? > > + MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT > > + }, { > > + DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, > > + MT8195_VDO0_SEL_IN, > Why this mask MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE is 0? > > + MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0, > > + MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT, > Why this mask MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 is 0? > Regards, > CK I'll fix the 0 mask problem with the define of GENMASK(h, l) for each mux settings. Regards, Jason-JH.Lin > > + MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_IN, > > MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0, > > + MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0 > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0, > > + MT8195_VDO0_SEL_OUT, > > MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN, > > + MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN > > + }, { > > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_DSI0, > > + MT8195_SOUT_DISP_DITHER0_TO_DSI0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0, > > + MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0 > > + }, { > > + DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, > > + MT8195_VDO0_SEL_OUT, > > MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE, > > + MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE > > + }, { > > + DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, > > + MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_DP_INTF0, > > + MT8195_SOUT_VPP_MERGE_TO_DP_INTF0 > > + } > > +}; > > + > > -- Jason-JH Lin <jason-jh.lin@mediatek.com> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-26 4:18 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-07 10:14 [PATCH v14 00/12] Add Mediatek Soc DRM (vdosys0) support for mt8195 jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 01/12] dt-bindings: arm: mediatek: mmsys: add power and gce properties jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 02/12] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 03/12] dt-bindings: display: mediatek: disp: split each block to individual yaml jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 04/12] dt-bindings: display: mediatek: dsc: add yaml for mt8195 SoC binding jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 05/12] dt-bindings: display: mediatek: merge: add additional prop for mt8195 jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 06/12] dt-bindings: display: mediatek: add mt8195 SoC binding for vdosys0 jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 07/12] dt-bindings: arm: mediatek: move out common module from display folder jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 08/12] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-21 2:45 ` Jason-JH Lin 2022-01-21 2:45 ` Jason-JH Lin 2022-01-24 8:16 ` CK Hu 2022-01-24 8:16 ` CK Hu 2022-01-25 3:44 ` CK Hu 2022-01-25 3:44 ` CK Hu 2022-01-26 4:18 ` Jason-JH Lin [this message] 2022-01-26 4:18 ` Jason-JH Lin 2022-01-07 10:14 ` [PATCH v14 09/12] soc: mediatek: add mtk-mutex " jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-24 9:13 ` CK Hu 2022-01-24 9:13 ` CK Hu 2022-01-26 4:43 ` Jason-JH Lin 2022-01-26 4:43 ` Jason-JH Lin 2022-01-07 10:14 ` [PATCH v14 10/12] drm/mediatek: add DSC support for mediatek-drm jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 11/12] drm/mediatek: add MERGE " jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin 2022-01-07 10:14 ` [PATCH v14 12/12] drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 jason-jh.lin 2022-01-07 10:14 ` jason-jh.lin
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=54aa0b9c88cf421eb382def79f3e06ef93d33c02.camel@mediatek.com \ --to=jason-jh.lin@mediatek.com \ --cc=airlied@linux.ie \ --cc=alexandre.torgue@foss.st.com \ --cc=angelogioacchino.delregno@collabora.com \ --cc=chunkuang.hu@kernel.org \ --cc=ck.hu@mediatek.com \ --cc=daniel@ffwll.ch \ --cc=devicetree@vger.kernel.org \ --cc=enric.balletbo@collabora.com \ --cc=fparent@baylibre.com \ --cc=hsinyi@chromium.org \ --cc=jitao.shi@mediatek.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mediatek@lists.infradead.org \ --cc=linux-stm32@st-md-mailman.stormreply.com \ --cc=matthias.bgg@gmail.com \ --cc=mcoquelin.stm32@gmail.com \ --cc=moudy.ho@mediatek.com \ --cc=nancy.lin@mediatek.com \ --cc=p.zabel@pengutronix.de \ --cc=robh+dt@kernel.org \ --cc=roy-cw.yeh@mediatek.com \ --cc=singo.chang@mediatek.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.