All of lore.kernel.org
 help / color / mirror / Atom feed
From: Al Stone <ahs3@redhat.com>
To: Hanjun Guo <hanjun.guo@linaro.org>,
	Will Deacon <will.deacon@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org
Subject: Re: [PATCH] ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry
Date: Wed, 01 Jul 2015 11:02:25 -0600	[thread overview]
Message-ID: <55941D21.5030604@redhat.com> (raw)
In-Reply-To: <1435757843-13236-1-git-send-email-hanjun.guo@linaro.org>

On 07/01/2015 07:37 AM, Hanjun Guo wrote:
> It is normal that firmware presents GICC entry or entries (processors)
> with disabled flag in ACPI MADT, taking a system of 16 cpus for example,
> ACPI firmware may present 8 enabled first with another 8 cpus disabled
> in MADT, the disabled cpus can be hot-added later.
> 
> Firmware may also present more cpus than the hardware actually has, but
> disabled the unused ones, and easily enable it when the hardware has such
> cpus to make the firmware code scalable.
> 
> So that's not an error for disabled cpus in MADT, we can switch
> pr_err() to pr_debug() instead.
> 
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
>  arch/arm64/kernel/smp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
> index 4b2121b..5caf04a 100644
> --- a/arch/arm64/kernel/smp.c
> +++ b/arch/arm64/kernel/smp.c
> @@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
>  	}
>  
>  	if (!(processor->flags & ACPI_MADT_ENABLED)) {
> -		pr_err("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
> +		pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
>  		return;
>  	}
>  
> 

Yeah, good point.  I'm all for making the boot a little quieter by default.

Reviewed-by: Al Stone <ahs3@redhat.com>

-- 
ciao,
al
-----------------------------------
Al Stone
Software Engineer
Red Hat, Inc.
ahs3@redhat.com
-----------------------------------

WARNING: multiple messages have this Message-ID (diff)
From: ahs3@redhat.com (Al Stone)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry
Date: Wed, 01 Jul 2015 11:02:25 -0600	[thread overview]
Message-ID: <55941D21.5030604@redhat.com> (raw)
In-Reply-To: <1435757843-13236-1-git-send-email-hanjun.guo@linaro.org>

On 07/01/2015 07:37 AM, Hanjun Guo wrote:
> It is normal that firmware presents GICC entry or entries (processors)
> with disabled flag in ACPI MADT, taking a system of 16 cpus for example,
> ACPI firmware may present 8 enabled first with another 8 cpus disabled
> in MADT, the disabled cpus can be hot-added later.
> 
> Firmware may also present more cpus than the hardware actually has, but
> disabled the unused ones, and easily enable it when the hardware has such
> cpus to make the firmware code scalable.
> 
> So that's not an error for disabled cpus in MADT, we can switch
> pr_err() to pr_debug() instead.
> 
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
>  arch/arm64/kernel/smp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
> index 4b2121b..5caf04a 100644
> --- a/arch/arm64/kernel/smp.c
> +++ b/arch/arm64/kernel/smp.c
> @@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
>  	}
>  
>  	if (!(processor->flags & ACPI_MADT_ENABLED)) {
> -		pr_err("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
> +		pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
>  		return;
>  	}
>  
> 

Yeah, good point.  I'm all for making the boot a little quieter by default.

Reviewed-by: Al Stone <ahs3@redhat.com>

-- 
ciao,
al
-----------------------------------
Al Stone
Software Engineer
Red Hat, Inc.
ahs3 at redhat.com
-----------------------------------

  reply	other threads:[~2015-07-01 17:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-01 13:37 [PATCH] ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry Hanjun Guo
2015-07-01 13:37 ` Hanjun Guo
2015-07-01 17:02 ` Al Stone [this message]
2015-07-01 17:02   ` Al Stone
2015-07-02 16:29 ` Catalin Marinas
2015-07-02 16:29   ` Catalin Marinas
2015-07-02 17:40   ` Mark Salter
2015-07-02 17:40     ` Mark Salter
2015-07-03  1:15   ` Hanjun Guo
2015-07-02 17:38 ` Mark Salter
2015-07-02 17:38   ` Mark Salter
2015-07-03  1:18   ` Hanjun Guo
2015-07-03  1:18     ` Hanjun Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55941D21.5030604@redhat.com \
    --to=ahs3@redhat.com \
    --cc=Lorenzo.Pieralisi@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=hanjun.guo@linaro.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=rjw@rjwysocki.net \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.