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From: Zhou Wang <wangzhou1@hisilicon.com>
To: James Morse <james.morse@arm.com>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jg1.han@samsung.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	"thomas.petazzoni@free-electrons.com"
	<thomas.petazzoni@free-electrons.com>,
	Jason Cooper <jason@lakedaemon.net>,
	"robh@kernel.org" <robh@kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Yuanzhichang <yuanzhichang@hisilicon.com>,
	Zhudacai <zhudacai@hisilicon.com>,
	zhangjukuo <zhangjukuo@huawei.com>,
	qiuzhenfa <qiuzhenfa@hisilicon.com>,
	"liudongdong (C)" <liudongdong3@huawei.com>,
	qiujiang <qiujiang@huawei.com>, Kangfenglong <kangfenglo>
Subject: Re: [PATCH v5 2/5] PCI: designware: Add ARM64 support
Date: Wed, 5 Aug 2015 09:40:50 +0800	[thread overview]
Message-ID: <55C169A2.10900@hisilicon.com> (raw)
In-Reply-To: <55C09694.30506@arm.com>

On 2015/8/4 18:40, James Morse wrote:
> On 04/08/15 11:23, Gabriele Paoloni wrote:
>> Hi James
>>
>> Please see "[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range"
>>
>> I think if you apply this patch your problem should be solved...
>>
>> If you follow the discussion you see that this patch is going to be part 
>> of the next designware patchset...
> 
> Yes I just spotted that series after continuing through my email backlog.
> 
>> Wang Zhou said "You need apply Gabriele's patch before applying this patch."
>> but he didn't specify which one and obviously this patch should have been part
>> of the patch-set
> 
> I assumed he meant your patch 1 in the same series, (given the reply was to
> patch 2).
> 
> With the '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'
> applied before patches and 1 and 2 of this series - pcie on the
> 'Freescale i.MX6 Quad SABRE Lite Board' works fine.
> 
> I can rescan the bus, load firmware, list nearby APs, and even get MSIs
> coming from the card.
> 
> Tested-by: James Morse <james.morse@arm.com>
> 
> 
> 
> James
> 
> .
>

Hi James,

Many thanks for your help to test!

I need apologize for not giving a clear message. What I mean is applying
Gab's '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'.
I am very sorry for wasting your time :(

Above Gab's patch will be merged in my next series. Hope that will make
thing clearer.

It is good that these patches work fine on your board! Hope we can get
more tests on other ARM32 boards.

Thanks again,
Zhou

.

WARNING: multiple messages have this Message-ID (diff)
From: Zhou Wang <wangzhou1@hisilicon.com>
To: James Morse <james.morse@arm.com>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jg1.han@samsung.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	"thomas.petazzoni@free-electrons.com"
	<thomas.petazzoni@free-electrons.com>,
	Jason Cooper <jason@lakedaemon.net>,
	"robh@kernel.org" <robh@kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Yuanzhichang <yuanzhichang@hisilicon.com>,
	Zhudacai <zhudacai@hisilicon.com>,
	zhangjukuo <zhangjukuo@huawei.com>,
	qiuzhenfa <qiuzhenfa@hisilicon.com>,
	"liudongdong (C)" <liudongdong3@huawei.com>,
	qiujiang <qiujiang@huawei.com>,
	Kangfenglong <kangfenglong@huawei.com>,
	"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>
Subject: Re: [PATCH v5 2/5] PCI: designware: Add ARM64 support
Date: Wed, 5 Aug 2015 09:40:50 +0800	[thread overview]
Message-ID: <55C169A2.10900@hisilicon.com> (raw)
In-Reply-To: <55C09694.30506@arm.com>

On 2015/8/4 18:40, James Morse wrote:
> On 04/08/15 11:23, Gabriele Paoloni wrote:
>> Hi James
>>
>> Please see "[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range"
>>
>> I think if you apply this patch your problem should be solved...
>>
>> If you follow the discussion you see that this patch is going to be part 
>> of the next designware patchset...
> 
> Yes I just spotted that series after continuing through my email backlog.
> 
>> Wang Zhou said "You need apply Gabriele's patch before applying this patch."
>> but he didn't specify which one and obviously this patch should have been part
>> of the patch-set
> 
> I assumed he meant your patch 1 in the same series, (given the reply was to
> patch 2).
> 
> With the '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'
> applied before patches and 1 and 2 of this series - pcie on the
> 'Freescale i.MX6 Quad SABRE Lite Board' works fine.
> 
> I can rescan the bus, load firmware, list nearby APs, and even get MSIs
> coming from the card.
> 
> Tested-by: James Morse <james.morse@arm.com>
> 
> 
> 
> James
> 
> .
>

Hi James,

Many thanks for your help to test!

I need apologize for not giving a clear message. What I mean is applying
Gab's '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'.
I am very sorry for wasting your time :(

Above Gab's patch will be merged in my next series. Hope that will make
thing clearer.

It is good that these patches work fine on your board! Hope we can get
more tests on other ARM32 boards.

Thanks again,
Zhou

.


WARNING: multiple messages have this Message-ID (diff)
From: wangzhou1@hisilicon.com (Zhou Wang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 2/5] PCI: designware: Add ARM64 support
Date: Wed, 5 Aug 2015 09:40:50 +0800	[thread overview]
Message-ID: <55C169A2.10900@hisilicon.com> (raw)
In-Reply-To: <55C09694.30506@arm.com>

On 2015/8/4 18:40, James Morse wrote:
> On 04/08/15 11:23, Gabriele Paoloni wrote:
>> Hi James
>>
>> Please see "[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range"
>>
>> I think if you apply this patch your problem should be solved...
>>
>> If you follow the discussion you see that this patch is going to be part 
>> of the next designware patchset...
> 
> Yes I just spotted that series after continuing through my email backlog.
> 
>> Wang Zhou said "You need apply Gabriele's patch before applying this patch."
>> but he didn't specify which one and obviously this patch should have been part
>> of the patch-set
> 
> I assumed he meant your patch 1 in the same series, (given the reply was to
> patch 2).
> 
> With the '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'
> applied before patches and 1 and 2 of this series - pcie on the
> 'Freescale i.MX6 Quad SABRE Lite Board' works fine.
> 
> I can rescan the bus, load firmware, list nearby APs, and even get MSIs
> coming from the card.
> 
> Tested-by: James Morse <james.morse@arm.com>
> 
> 
> 
> James
> 
> .
>

Hi James,

Many thanks for your help to test!

I need apologize for not giving a clear message. What I mean is applying
Gab's '[PATCH v6] PCI: Store PCIe bus address in struct of_pci_range'.
I am very sorry for wasting your time :(

Above Gab's patch will be merged in my next series. Hope that will make
thing clearer.

It is good that these patches work fine on your board! Hope we can get
more tests on other ARM32 boards.

Thanks again,
Zhou

.

  parent reply	other threads:[~2015-08-05  1:40 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-25  3:21 [PATCH v5 0/5] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-07-25  3:21 ` Zhou Wang
2015-07-25  3:21 ` Zhou Wang
2015-07-25  3:21 ` [PATCH v5 2/5] PCI: designware: Add ARM64 support Zhou Wang
2015-07-25  3:21   ` Zhou Wang
2015-07-25  3:21   ` Zhou Wang
2015-07-28  6:21   ` Zhou Wang
2015-07-28  6:21     ` Zhou Wang
2015-07-28  6:21     ` Zhou Wang
     [not found]     ` <55B71F75.5030907-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-08-04  9:34       ` James Morse
2015-08-04  9:34         ` James Morse
2015-08-04  9:34         ` James Morse
2015-08-04 10:23         ` Gabriele Paoloni
2015-08-04 10:23           ` Gabriele Paoloni
2015-08-04 10:23           ` Gabriele Paoloni
2015-08-04 10:40           ` James Morse
2015-08-04 10:40             ` James Morse
2015-08-04 10:40             ` James Morse
     [not found]             ` <55C09694.30506-5wv7dgnIgG8@public.gmane.org>
2015-08-04 10:43               ` Gabriele Paoloni
2015-08-04 10:43                 ` Gabriele Paoloni
2015-08-04 10:43                 ` Gabriele Paoloni
2015-08-05  1:40             ` Zhou Wang [this message]
2015-08-05  1:40               ` Zhou Wang
2015-08-05  1:40               ` Zhou Wang
2015-07-29 17:24   ` Lorenzo Pieralisi
2015-07-29 17:24     ` Lorenzo Pieralisi
2015-07-29 17:24     ` Lorenzo Pieralisi
2015-07-30  3:17     ` Zhou Wang
2015-07-30  3:17       ` Zhou Wang
2015-07-30  3:17       ` Zhou Wang
     [not found] ` <1437794486-21134-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-07-25  3:21   ` [PATCH v5 1/5] ARM/PCI: remove align_resource in pci_sys_data Zhou Wang
2015-07-25  3:21     ` Zhou Wang
2015-07-25  3:21     ` Zhou Wang
     [not found]     ` <1437794486-21134-2-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-07-28  7:17       ` Zhou Wang
2015-07-28  7:17         ` Zhou Wang
2015-07-28  7:17         ` Zhou Wang
2015-07-28 17:44         ` Lorenzo Pieralisi
2015-07-28 17:44           ` Lorenzo Pieralisi
2015-07-28 17:44           ` Lorenzo Pieralisi
2015-07-30 22:48           ` Rob Herring
2015-07-30 22:48             ` Rob Herring
2015-07-30 22:48             ` Rob Herring
2015-07-31  7:57             ` Gabriele Paoloni
2015-07-31  7:57               ` Gabriele Paoloni
2015-07-31  7:57               ` Gabriele Paoloni
2015-07-25  3:21   ` [PATCH v5 3/5] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-07-25  3:21     ` Zhou Wang
2015-07-25  3:21     ` Zhou Wang
2015-07-25  3:21   ` [PATCH v5 5/5] MAINTAINERS: Add pcie-hisi maintainer Zhou Wang
2015-07-25  3:21     ` Zhou Wang
2015-07-25  3:21     ` Zhou Wang
2015-07-25  3:21 ` [PATCH v5 4/5] Documentation: DT: Add HiSilicon PCIe host binding Zhou Wang
2015-07-25  3:21   ` Zhou Wang
2015-07-25  3:21   ` Zhou Wang
2015-07-28  7:28   ` Zhou Wang
2015-07-28  7:28     ` Zhou Wang
2015-07-28  7:28     ` Zhou Wang

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