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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jason Andryuk <jandryuk@gmail.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>,
	"Jan Beulich" <JBeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>
Subject: Re: [PATCH 8/8] x86/spec-ctrl: Mitigate the Zen1 DIV leakge
Date: Thu, 14 Sep 2023 21:05:15 +0100	[thread overview]
Message-ID: <55bf2c04-c238-ba86-3ef4-99b0524c17ae@citrix.com> (raw)
In-Reply-To: <CAKf6xpuRh00P9at-bY+XE669vjoMf_xMwozQkCx=DL6Q2kLwgg@mail.gmail.com>

On 14/09/2023 2:12 pm, Jason Andryuk wrote:
> On Wed, Sep 13, 2023 at 6:09 PM Andrew Cooper <andrew.cooper3@citrix.com> wrote:
>> @@ -955,6 +960,40 @@ static void __init srso_calculations(bool hw_smt_enabled)
>>          setup_force_cpu_cap(X86_FEATURE_SRSO_NO);
>>  }
>>
>> +/*
>> + * Div leakage is specific to the AMD Zen1 microarchitecure.  Use STIBP as a
>> + * heuristic to select between Zen1 and Zen2 uarches.
>> + */
>> +static bool __init has_div_vuln(void)
>> +{
>> +    if ( !(boot_cpu_data.x86_vendor &
>> +           (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
>> +        return false;
>> +
>> +    if ( (boot_cpu_data.x86 != 0x17 && boot_cpu_data.x86 != 0x18) ||
>> +         !boot_cpu_has(X86_FEATURE_AMD_STIBP) )
>> +        return false;
>> +
>> +    return true;
>> +}
>> +
>> +static void __init div_calculations(bool hw_smt_enabled)
>> +{
>> +    bool cpu_bug_div = has_div_vuln();
>> +
> Would it make sense to add
>     if ( !cpu_bug_div )
>         return
> ...
>
>> +    if ( opt_div_scrub == -1 )
>> +        opt_div_scrub = cpu_bug_div;
>> +
>> +    if ( opt_div_scrub )
>> +        setup_force_cpu_cap(X86_FEATURE_SC_DIV);
> ...so that div-scrub=1 isn't setting X86_FEATURE_SC_DIV on un-affected
> hardware?  Or do you want to leave command line control in place in
> case it might be needed as a future workaround on other hardware?

All options (where possible) allow for paths to be explicitly activated
on un-affected hardware so we can test this giant mess.

The only cases where we ignore a user choice is when the result will
crash from e.g. #GP due to insufficient microcode.

~Andrew


      reply	other threads:[~2023-09-14 20:05 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-13 20:27 [PATCH 0/8] x86/spec-ctrl: AMD DIV fix, and VERW prerequisite bugfixes Andrew Cooper
2023-09-13 20:27 ` [PATCH 1/8] x86/spec-ctrl: Fix confusion between SPEC_CTRL_EXIT_TO_XEN{,_IST} Andrew Cooper
2023-09-14  6:56   ` Jan Beulich
2023-09-14  9:54     ` Andrew Cooper
2023-09-13 20:27 ` [PATCH 2/8] x86/spec-ctrl: Fold DO_SPEC_CTRL_EXIT_TO_XEN into it's single user Andrew Cooper
2023-09-14  6:59   ` Jan Beulich
2023-09-13 20:27 ` [PATCH 3/8] x86/spec-ctrl: Turn the remaining SPEC_CTRL_{ENTRY,EXIT}_* into asm macros Andrew Cooper
2023-09-14  7:20   ` Jan Beulich
2023-09-13 20:27 ` [PATCH 4/8] x86/spec-ctrl: Extend all SPEC_CTRL_{ENTER,EXIT}_* comments Andrew Cooper
2023-09-14  7:58   ` Jan Beulich
2023-09-14 19:23     ` Andrew Cooper
2023-09-15  7:07       ` Jan Beulich
2023-09-15  9:27         ` Andrew Cooper
2023-09-13 20:27 ` [PATCH 5/8] x86/entry: Adjust restore_all_xen to hold stack_end in %r14 Andrew Cooper
2023-09-14  8:51   ` Jan Beulich
2023-09-14 19:28     ` Andrew Cooper
2023-09-13 20:27 ` [PATCH 6/8] x86/entry: Track the IST-ness of an entry for the exit paths Andrew Cooper
2023-09-14  9:32   ` Jan Beulich
2023-09-14 19:44     ` Andrew Cooper
2023-09-15  7:13       ` Jan Beulich
2023-09-15  9:30         ` Andrew Cooper
2023-09-13 20:27 ` [PATCH 7/8] x86/spec-ctrl: Issue VERW during IST exit to Xen Andrew Cooper
2023-09-14 10:01   ` Jan Beulich
2023-09-14 19:49     ` Andrew Cooper
2023-09-15  7:15       ` Jan Beulich
2023-09-13 20:27 ` [PATCH 8/8] x86/spec-ctrl: Mitigate the Zen1 DIV leakge Andrew Cooper
2023-09-13 20:43   ` Andrew Cooper
2023-09-13 21:12   ` Marek Marczykowski-Górecki
2023-09-14 10:52   ` Jan Beulich
2023-09-14 20:01     ` Andrew Cooper
2023-09-14 13:12   ` Jason Andryuk
2023-09-14 20:05     ` Andrew Cooper [this message]

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