All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michal Simek <michal.simek@xilinx.com>
To: linux-arm-kernel@lists.infradead.org
Cc: "Shubhrajyoti Datta" <shubhrajyoti.datta@xilinx.com>,
	"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
	"Punnaiah Choudary Kalluri"
	<punnaiah.choudary.kalluri@xilinx.com>,
	monstr@monstr.eu, "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
	"Carlo Caione" <carlo@endlessm.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Duc Dang" <dhdang@apm.com>,
	"Bharat Kumar Gogada" <bharat.kumar.gogada@xilinx.com>,
	"Moritz Fischer" <mdf@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Stefan Krsmanovic" <stefan.krsmanovic@aggios.com>,
	"Will Deacon" <will.deacon@arm.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>
Subject: [PATCH 03/10] arm64: zynqmp: Add operating points
Date: Thu, 20 Jul 2017 14:17:02 +0200	[thread overview]
Message-ID: <560c538494f80ec67b553d26365bfaf0918f4215.1500552941.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com>
In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com>

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Adding operating-points-v2 for zynqmp.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 8e6cf0cf3a69..50636e098724 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -24,6 +24,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
+			operating-points-v2 = <&cpu_opp_table>;
 			reg = <0x0>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
@@ -33,6 +34,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x1>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -41,6 +43,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x2>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -49,6 +52,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x3>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -66,6 +70,31 @@
 		};
 	};
 
+	cpu_opp_table: cpu_opp_table {
+		compatible = "operating-points-v2";
+		opp-shared;
+		opp00 {
+			opp-hz = /bits/ 64 <1199999988>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <599999994>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <399999996>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <299999997>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupt-parent = <&gic>;
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: linux-arm-kernel@lists.infradead.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
	devicetree@vger.kernel.org, monstr@monstr.eu,
	"Stefan Krsmanovic" <stefan.krsmanovic@aggios.com>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Will Deacon" <will.deacon@arm.com>, "Duc Dang" <dhdang@apm.com>,
	"Shubhrajyoti Datta" <shubhrajyoti.datta@xilinx.com>,
	linux-kernel@vger.kernel.org,
	"Bharat Kumar Gogada" <bharat.kumar.gogada@xilinx.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Moritz Fischer" <mdf@kernel.org>,
	"Carlo Caione" <carlo@endlessm.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Punnaiah Choudary Kalluri"
	<punnaiah.choudary.kalluri@xilinx.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Sören Brinkmann" <soren.brinkmann@xilinx.com>
Subject: [PATCH 03/10] arm64: zynqmp: Add operating points
Date: Thu, 20 Jul 2017 14:17:02 +0200	[thread overview]
Message-ID: <560c538494f80ec67b553d26365bfaf0918f4215.1500552941.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com>
In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com>

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Adding operating-points-v2 for zynqmp.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 8e6cf0cf3a69..50636e098724 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -24,6 +24,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
+			operating-points-v2 = <&cpu_opp_table>;
 			reg = <0x0>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
@@ -33,6 +34,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x1>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -41,6 +43,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x2>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -49,6 +52,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x3>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -66,6 +70,31 @@
 		};
 	};
 
+	cpu_opp_table: cpu_opp_table {
+		compatible = "operating-points-v2";
+		opp-shared;
+		opp00 {
+			opp-hz = /bits/ 64 <1199999988>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <599999994>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <399999996>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <299999997>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupt-parent = <&gic>;
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: michal.simek@xilinx.com (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/10] arm64: zynqmp: Add operating points
Date: Thu, 20 Jul 2017 14:17:02 +0200	[thread overview]
Message-ID: <560c538494f80ec67b553d26365bfaf0918f4215.1500552941.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com>

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Adding operating-points-v2 for zynqmp.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 8e6cf0cf3a69..50636e098724 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -24,6 +24,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
+			operating-points-v2 = <&cpu_opp_table>;
 			reg = <0x0>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
@@ -33,6 +34,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x1>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -41,6 +43,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x2>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -49,6 +52,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x3>;
+			operating-points-v2 = <&cpu_opp_table>;
 			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 
@@ -66,6 +70,31 @@
 		};
 	};
 
+	cpu_opp_table: cpu_opp_table {
+		compatible = "operating-points-v2";
+		opp-shared;
+		opp00 {
+			opp-hz = /bits/ 64 <1199999988>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <599999994>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <399999996>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <299999997>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <500000>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,armv8-pmuv3";
 		interrupt-parent = <&gic>;
-- 
1.9.1

  parent reply	other threads:[~2017-07-20 12:18 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-20 12:16 [PATCH 00/10] arm64: zynqmp: dtsi changes Michal Simek
2017-07-20 12:16 ` Michal Simek
2017-07-20 12:16 ` Michal Simek
2017-07-20 12:17 ` [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-25 16:47   ` Moritz Fischer
2017-07-25 16:47     ` Moritz Fischer
2017-07-25 16:47     ` Moritz Fischer
2017-07-20 12:17 ` [PATCH 02/10] arm64: zynqmp: Add idle state for ZynqMP Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` Michal Simek [this message]
2017-07-20 12:17   ` [PATCH 03/10] arm64: zynqmp: Add operating points Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 04/10] arm64: zynqmp: Add dcc console for zynqmp Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 05/10] arm64: zynqmp: Add CCI-400 node Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 06/10] arm64: zynqmp: Adding prefetchable memory space to pcie node Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 07/10] arm64: zynqmp: Add support for RTC Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 08/10] arm64: zynqmp: Correct IRQ nr for the SMMU Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17 ` [PATCH 09/10] arm64: zynqmp: Add new uartps compatible string Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-25 16:49   ` Moritz Fischer
2017-07-25 16:49     ` Moritz Fischer
2017-07-25 16:49     ` Moritz Fischer
2017-07-20 12:17 ` [PATCH 10/10] arm64: zynqmp: Set status disabled in dtsi Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-07-20 12:17   ` Michal Simek
2017-08-03 11:31 ` [PATCH 00/10] arm64: zynqmp: dtsi changes Michal Simek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=560c538494f80ec67b553d26365bfaf0918f4215.1500552941.git.michal.simek@xilinx.com \
    --to=michal.simek@xilinx.com \
    --cc=bharat.kumar.gogada@xilinx.com \
    --cc=carlo@endlessm.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dhdang@apm.com \
    --cc=edgar.iglesias@xilinx.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mdf@kernel.org \
    --cc=monstr@monstr.eu \
    --cc=punnaiah.choudary.kalluri@xilinx.com \
    --cc=robh+dt@kernel.org \
    --cc=shubhrajyoti.datta@xilinx.com \
    --cc=soren.brinkmann@xilinx.com \
    --cc=stefan.krsmanovic@aggios.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.