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From: Robin Murphy <robin.murphy@arm.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Samuel Holland <samuel@sholland.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Atish Patra <atishp@atishpatra.org>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>
Subject: Re: Similar SoCs with different CPUs and interrupt bindings
Date: Wed, 21 Sep 2022 11:14:10 +0100	[thread overview]
Message-ID: <567e9e6c-e34c-4ded-9622-9ad8387dd24b@arm.com> (raw)
In-Reply-To: <df9ff0bd-ad0e-4b5b-859d-dd913628edc8@linaro.org>

On 2022-09-21 10:26, Krzysztof Kozlowski wrote:
> On 21/09/2022 11:20, Lad, Prabhakar wrote:
>>>
>>> What do you mean? Macros support string concatenation and simple
>>> arithmetic like adding numbers. I just tested it.
>>>
>> I did try the below:
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> index 689aa4ba416b..0f923c276cd3 100644
>> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> @@ -8,6 +8,8 @@
>>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>>
>> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr na
>> +
>>   / {
>>       compatible = "renesas,r9a07g043";
>>       #address-cells = <2>;
>> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>>               compatible = "renesas,r9a07g043-ssi",
>>                        "renesas,rz-ssi";
>>               reg = <0 0x1004a000 0 0x400>;
>> -            interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +            interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
>>                        <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
>>
>> This worked as expected, but couldn't get the arithmetic operation
>> working. Could you please provide an example?
> 
> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> index ff6aab388eb7..0ecca775fa3f 100644
> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -8,6 +8,8 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>   
> +#define SOC_PERIPHERAL_IRQ_NUMBER(na)  (na + 32)
> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na)
>   / {
>          compatible = "renesas,r9a07g043";
>          #address-cells = <2>;
> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>                          compatible = "renesas,r9a07g043-ssi",
>                                       "renesas,rz-ssi";
>                          reg = <0 0x1004a000 0 0x400>;
> -                       interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +                       interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
> 
> 
> 
> Or any other method like that....

Which will generate the text:

	"interrupts = <GIC_SPI 330 (IRQ_TYPE_LEVEL_HIGH + 32)>,"

(give or take some whitespace)

CPP supports constant expressions in #if and #elif directives, but 
macros are purely literal text replacement. It might technically be 
achievable with some insane CPP metaprogramming, but for all practical 
purposes this is a non-starter unless dtc itself grows the ability to 
process arithmetic expressions.

Thanks,
Robin.

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Samuel Holland <samuel@sholland.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Atish Patra <atishp@atishpatra.org>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>
Subject: Re: Similar SoCs with different CPUs and interrupt bindings
Date: Wed, 21 Sep 2022 11:14:10 +0100	[thread overview]
Message-ID: <567e9e6c-e34c-4ded-9622-9ad8387dd24b@arm.com> (raw)
In-Reply-To: <df9ff0bd-ad0e-4b5b-859d-dd913628edc8@linaro.org>

On 2022-09-21 10:26, Krzysztof Kozlowski wrote:
> On 21/09/2022 11:20, Lad, Prabhakar wrote:
>>>
>>> What do you mean? Macros support string concatenation and simple
>>> arithmetic like adding numbers. I just tested it.
>>>
>> I did try the below:
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> index 689aa4ba416b..0f923c276cd3 100644
>> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> @@ -8,6 +8,8 @@
>>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>>
>> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr na
>> +
>>   / {
>>       compatible = "renesas,r9a07g043";
>>       #address-cells = <2>;
>> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>>               compatible = "renesas,r9a07g043-ssi",
>>                        "renesas,rz-ssi";
>>               reg = <0 0x1004a000 0 0x400>;
>> -            interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +            interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
>>                        <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
>>
>> This worked as expected, but couldn't get the arithmetic operation
>> working. Could you please provide an example?
> 
> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> index ff6aab388eb7..0ecca775fa3f 100644
> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -8,6 +8,8 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>   
> +#define SOC_PERIPHERAL_IRQ_NUMBER(na)  (na + 32)
> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na)
>   / {
>          compatible = "renesas,r9a07g043";
>          #address-cells = <2>;
> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>                          compatible = "renesas,r9a07g043-ssi",
>                                       "renesas,rz-ssi";
>                          reg = <0 0x1004a000 0 0x400>;
> -                       interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +                       interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
> 
> 
> 
> Or any other method like that....

Which will generate the text:

	"interrupts = <GIC_SPI 330 (IRQ_TYPE_LEVEL_HIGH + 32)>,"

(give or take some whitespace)

CPP supports constant expressions in #if and #elif directives, but 
macros are purely literal text replacement. It might technically be 
achievable with some insane CPP metaprogramming, but for all practical 
purposes this is a non-starter unless dtc itself grows the ability to 
process arithmetic expressions.

Thanks,
Robin.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Samuel Holland <samuel@sholland.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Atish Patra <atishp@atishpatra.org>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>
Subject: Re: Similar SoCs with different CPUs and interrupt bindings
Date: Wed, 21 Sep 2022 11:14:10 +0100	[thread overview]
Message-ID: <567e9e6c-e34c-4ded-9622-9ad8387dd24b@arm.com> (raw)
In-Reply-To: <df9ff0bd-ad0e-4b5b-859d-dd913628edc8@linaro.org>

On 2022-09-21 10:26, Krzysztof Kozlowski wrote:
> On 21/09/2022 11:20, Lad, Prabhakar wrote:
>>>
>>> What do you mean? Macros support string concatenation and simple
>>> arithmetic like adding numbers. I just tested it.
>>>
>> I did try the below:
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> index 689aa4ba416b..0f923c276cd3 100644
>> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
>> @@ -8,6 +8,8 @@
>>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>>
>> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr na
>> +
>>   / {
>>       compatible = "renesas,r9a07g043";
>>       #address-cells = <2>;
>> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>>               compatible = "renesas,r9a07g043-ssi",
>>                        "renesas,rz-ssi";
>>               reg = <0 0x1004a000 0 0x400>;
>> -            interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +            interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
>>                        <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
>>                        <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
>>
>> This worked as expected, but couldn't get the arithmetic operation
>> working. Could you please provide an example?
> 
> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> index ff6aab388eb7..0ecca775fa3f 100644
> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -8,6 +8,8 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/clock/r9a07g043-cpg.h>
>   
> +#define SOC_PERIPHERAL_IRQ_NUMBER(na)  (na + 32)
> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na)
>   / {
>          compatible = "renesas,r9a07g043";
>          #address-cells = <2>;
> @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
>                          compatible = "renesas,r9a07g043-ssi",
>                                       "renesas,rz-ssi";
>                          reg = <0 0x1004a000 0 0x400>;
> -                       interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +                       interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
> 
> 
> 
> Or any other method like that....

Which will generate the text:

	"interrupts = <GIC_SPI 330 (IRQ_TYPE_LEVEL_HIGH + 32)>,"

(give or take some whitespace)

CPP supports constant expressions in #if and #elif directives, but 
macros are purely literal text replacement. It might technically be 
achievable with some insane CPP metaprogramming, but for all practical 
purposes this is a non-starter unless dtc itself grows the ability to 
process arithmetic expressions.

Thanks,
Robin.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-09-21 10:14 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-21  7:46 Similar SoCs with different CPUs and interrupt bindings Geert Uytterhoeven
2022-09-21  7:46 ` Geert Uytterhoeven
2022-09-21  7:46 ` Geert Uytterhoeven
2022-09-21  8:49 ` Krzysztof Kozlowski
2022-09-21  8:49   ` Krzysztof Kozlowski
2022-09-21  8:49   ` Krzysztof Kozlowski
2022-09-21  9:20   ` Lad, Prabhakar
2022-09-21  9:20     ` Lad, Prabhakar
2022-09-21  9:20     ` Lad, Prabhakar
2022-09-21  9:26     ` Krzysztof Kozlowski
2022-09-21  9:26       ` Krzysztof Kozlowski
2022-09-21  9:26       ` Krzysztof Kozlowski
2022-09-21 10:07       ` Lad, Prabhakar
2022-09-21 10:07         ` Lad, Prabhakar
2022-09-21 10:07         ` Lad, Prabhakar
2022-09-21 10:08       ` Geert Uytterhoeven
2022-09-21 10:08         ` Geert Uytterhoeven
2022-09-21 10:08         ` Geert Uytterhoeven
2022-09-21 10:10         ` Krzysztof Kozlowski
2022-09-21 10:10           ` Krzysztof Kozlowski
2022-09-21 10:10           ` Krzysztof Kozlowski
2022-09-21 21:05         ` Conor Dooley
2022-09-21 21:05           ` Conor Dooley
2022-09-21 21:05           ` Conor Dooley
2022-09-21 10:14       ` Robin Murphy [this message]
2022-09-21 10:14         ` Robin Murphy
2022-09-21 10:14         ` Robin Murphy
2022-09-21 10:17         ` Krzysztof Kozlowski
2022-09-21 10:17           ` Krzysztof Kozlowski
2022-09-21 10:17           ` Krzysztof Kozlowski
2022-09-21 10:27           ` Robin Murphy
2022-09-21 10:27             ` Robin Murphy
2022-09-21 10:27             ` Robin Murphy
2022-09-21 10:10   ` Geert Uytterhoeven
2022-09-21 10:10     ` Geert Uytterhoeven
2022-09-21 10:10     ` Geert Uytterhoeven
2022-09-21  9:20 ` Robin Murphy
2022-09-21  9:20   ` Robin Murphy
2022-09-21  9:20   ` Robin Murphy
2022-09-21 10:13   ` Geert Uytterhoeven
2022-09-21 10:13     ` Geert Uytterhoeven
2022-09-21 10:13     ` Geert Uytterhoeven
2022-09-21 10:20     ` Krzysztof Kozlowski
2022-09-21 10:20       ` Krzysztof Kozlowski
2022-09-21 10:20       ` Krzysztof Kozlowski
2022-09-22  6:30   ` Arnd Bergmann
2022-09-22  6:30     ` Arnd Bergmann
2022-09-22  6:30     ` Arnd Bergmann
2022-09-22  6:40     ` Geert Uytterhoeven
2022-09-22  6:40       ` Geert Uytterhoeven
2022-09-22  6:40       ` Geert Uytterhoeven

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