From: Dirk Behme <dirk.behme@de.bosch.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 6/7] arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
Date: Tue, 16 Feb 2016 07:40:49 +0100 [thread overview]
Message-ID: <56C2C471.80000@de.bosch.com> (raw)
In-Reply-To: <1455568715-20880-7-git-send-email-geert+renesas@glider.be>
On 15.02.2016 21:38, Geert Uytterhoeven wrote:
> Add the missing "cache-unified" and "cache-level" properties to the
> Cortex-A57 cache-controller node.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v3:
> - Remaining part of "[PATCH v2 6/6] arm64: renesas: r8a7795: Add L2
> cache-controller nodes", after dropping the "arm,data-latency" and
> "arm,tag-latency" properties.
> ---
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index b5e46e4ff72ad003..c07f4e83b988ba42 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -68,6 +68,8 @@
>
> L2_CA57: cache-controller@0 {
> compatible = "cache";
> + cache-unified;
> + cache-level = <2>;
As this is completely unused on ARMv8 I don't think that we want to have
these unused entries in the DT.
Sudeep: What do you think?
Best regards
Dirk
WARNING: multiple messages have this Message-ID (diff)
From: Dirk Behme <dirk.behme@de.bosch.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
<linux-renesas-soc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 6/7] arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
Date: Tue, 16 Feb 2016 07:40:49 +0100 [thread overview]
Message-ID: <56C2C471.80000@de.bosch.com> (raw)
In-Reply-To: <1455568715-20880-7-git-send-email-geert+renesas@glider.be>
On 15.02.2016 21:38, Geert Uytterhoeven wrote:
> Add the missing "cache-unified" and "cache-level" properties to the
> Cortex-A57 cache-controller node.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v3:
> - Remaining part of "[PATCH v2 6/6] arm64: renesas: r8a7795: Add L2
> cache-controller nodes", after dropping the "arm,data-latency" and
> "arm,tag-latency" properties.
> ---
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index b5e46e4ff72ad003..c07f4e83b988ba42 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -68,6 +68,8 @@
>
> L2_CA57: cache-controller@0 {
> compatible = "cache";
> + cache-unified;
> + cache-level = <2>;
As this is completely unused on ARMv8 I don't think that we want to have
these unused entries in the DT.
Sudeep: What do you think?
Best regards
Dirk
WARNING: multiple messages have this Message-ID (diff)
From: dirk.behme@de.bosch.com (Dirk Behme)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/7] arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
Date: Tue, 16 Feb 2016 07:40:49 +0100 [thread overview]
Message-ID: <56C2C471.80000@de.bosch.com> (raw)
In-Reply-To: <1455568715-20880-7-git-send-email-geert+renesas@glider.be>
On 15.02.2016 21:38, Geert Uytterhoeven wrote:
> Add the missing "cache-unified" and "cache-level" properties to the
> Cortex-A57 cache-controller node.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v3:
> - Remaining part of "[PATCH v2 6/6] arm64: renesas: r8a7795: Add L2
> cache-controller nodes", after dropping the "arm,data-latency" and
> "arm,tag-latency" properties.
> ---
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index b5e46e4ff72ad003..c07f4e83b988ba42 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -68,6 +68,8 @@
>
> L2_CA57: cache-controller at 0 {
> compatible = "cache";
> + cache-unified;
> + cache-level = <2>;
As this is completely unused on ARMv8 I don't think that we want to have
these unused entries in the DT.
Sudeep: What do you think?
Best regards
Dirk
next prev parent reply other threads:[~2016-02-16 6:40 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-15 20:38 [PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2 cache-controller nodes Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
[not found] ` <1455568715-20880-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2016-02-15 20:38 ` [PATCH v3 1/7] ARM: dts: r8a73a4: Add " Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` [PATCH v3 4/7] ARM: dts: r8a7793: Add L2 cache-controller node Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` [PATCH v3 2/7] ARM: dts: r8a7790: Add L2 cache-controller nodes Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` [PATCH v3 3/7] ARM: dts: r8a7791: Add L2 cache-controller node Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` [PATCH v3 5/7] ARM: dts: r8a7794: " Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-15 20:38 ` [PATCH v3 6/7] arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
2016-02-16 6:40 ` Dirk Behme [this message]
2016-02-16 6:40 ` Dirk Behme
2016-02-16 6:40 ` Dirk Behme
2016-02-16 9:43 ` Sudeep Holla
2016-02-16 9:43 ` Sudeep Holla
2016-02-16 9:55 ` Dirk Behme
2016-02-16 9:55 ` Dirk Behme
2016-02-16 9:55 ` Dirk Behme
2016-02-15 20:38 ` [PATCH v3 7/7] arm64: dts: r8a7795: Add CA53 L2 cache-controller node Geert Uytterhoeven
2016-02-15 20:38 ` Geert Uytterhoeven
[not found] ` <1455568715-20880-8-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2016-02-16 6:44 ` Dirk Behme
2016-02-16 6:44 ` Dirk Behme
2016-02-16 6:44 ` Dirk Behme
2016-02-16 7:12 ` Geert Uytterhoeven
2016-02-16 7:12 ` Geert Uytterhoeven
[not found] ` <CAMuHMdX=Kgb-i+QpP=yNO2e6nw7sXuCutXPoK0U9NwK-OyANFA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-02-16 7:33 ` Dirk Behme
2016-02-16 7:33 ` Dirk Behme
2016-02-16 7:33 ` Dirk Behme
2016-02-16 9:46 ` Sudeep Holla
2016-02-16 9:46 ` Sudeep Holla
2016-02-16 9:46 ` Sudeep Holla
2016-02-17 5:53 ` [PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2 cache-controller nodes Simon Horman
2016-02-17 5:53 ` Simon Horman
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