From: Auger Eric <eric.auger@redhat.com> To: Suzuki K Poulose <suzuki.poulose@arm.com>, linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, marc.zyngier@arm.com, cdall@kernel.org, pbonzini@redhat.com, rkrcmar@redhat.com, will.deacon@arm.com, catalin.marinas@arm.com, james.morse@arm.com, dave.martin@arm.com, julien.grall@arm.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 17/18] kvm: arm64: Limit the minimum number of page table levels Date: Tue, 25 Sep 2018 12:00:48 +0200 [thread overview] Message-ID: <59231541-311f-e04b-3e6b-e073a8392316@redhat.com> (raw) In-Reply-To: <20180917104144.19188-18-suzuki.poulose@arm.com> Hi Suzuki, On 9/17/18 12:41 PM, Suzuki K Poulose wrote: > Since we are about to remove the lower limit on the IPA size, > make sure that we do not go to 1 level page table (e.g, with > 32bit IPA on 64K host with concatenation) to avoid splitting > the host PMD huge pages at stage2. > > Cc: Marc Zyngier <marc.zyngier@arm.com> > Cc: Christoffer Dall <cdall@kernel.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > arch/arm64/include/asm/stage2_pgtable.h | 8 +++++++- > arch/arm64/kvm/reset.c | 12 +++++++++++- > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/stage2_pgtable.h b/arch/arm64/include/asm/stage2_pgtable.h > index 352ec4158fdf..6a56fdff0823 100644 > --- a/arch/arm64/include/asm/stage2_pgtable.h > +++ b/arch/arm64/include/asm/stage2_pgtable.h > @@ -72,8 +72,14 @@ > /* > * The number of PTRS across all concatenated stage2 tables given by the > * number of bits resolved at the initial level. > + * If we force more number of levels than necessary, we may have more levels? > + * stage2_pgdir_shift > IPA, in which case, stage2_pgd_ptrs will have > + * one entry. > */ > -#define __s2_pgd_ptrs(ipa, lvls) (1 << ((ipa) - pt_levels_pgdir_shift((lvls)))) > +#define pgd_ptrs_shift(ipa, pgdir_shift) \ > + ((ipa) > (pgdir_shift) ? ((ipa) - (pgdir_shift)) : 0) > +#define __s2_pgd_ptrs(ipa, lvls) \ > + (1 << (pgd_ptrs_shift((ipa), pt_levels_pgdir_shift(lvls)))) > #define __s2_pgd_size(ipa, lvls) (__s2_pgd_ptrs((ipa), (lvls)) * sizeof(pgd_t)) > > #define stage2_pgd_ptrs(kvm) __s2_pgd_ptrs(kvm_phys_shift(kvm), kvm_stage2_levels(kvm)) > diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c > index 76972b19bdd7..0393bb974b23 100644 > --- a/arch/arm64/kvm/reset.c > +++ b/arch/arm64/kvm/reset.c > @@ -190,10 +190,19 @@ int kvm_arm_config_vm(struct kvm *kvm, unsigned long type) > { > u64 vtcr = VTCR_EL2_FLAGS; > u64 parange; > + u8 lvls; > > if (type) > return -EINVAL; > > + /* > + * Use a minimum 2 level page table to prevent splitting > + * host PMD huge pages at stage2. > + */ > + lvls = stage2_pgtable_levels(KVM_PHYS_SHIFT); > + if (lvls < 2) > + lvls = 2; > + > parange = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1) & 7; > if (parange > ID_AA64MMFR0_PARANGE_MAX) > parange = ID_AA64MMFR0_PARANGE_MAX; > @@ -210,7 +219,8 @@ int kvm_arm_config_vm(struct kvm *kvm, unsigned long type) > vtcr |= (kvm_get_vmid_bits() == 16) ? > VTCR_EL2_VS_16BIT : > VTCR_EL2_VS_8BIT; > - vtcr |= VTCR_EL2_LVLS_TO_SL0(stage2_pgtable_levels(KVM_PHYS_SHIFT)); > + nit: new line not requested Thanks Eric > + vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls); > vtcr |= VTCR_EL2_T0SZ(KVM_PHYS_SHIFT); > > kvm->arch.vtcr = vtcr; >
WARNING: multiple messages have this Message-ID (diff)
From: eric.auger@redhat.com (Auger Eric) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 17/18] kvm: arm64: Limit the minimum number of page table levels Date: Tue, 25 Sep 2018 12:00:48 +0200 [thread overview] Message-ID: <59231541-311f-e04b-3e6b-e073a8392316@redhat.com> (raw) In-Reply-To: <20180917104144.19188-18-suzuki.poulose@arm.com> Hi Suzuki, On 9/17/18 12:41 PM, Suzuki K Poulose wrote: > Since we are about to remove the lower limit on the IPA size, > make sure that we do not go to 1 level page table (e.g, with > 32bit IPA on 64K host with concatenation) to avoid splitting > the host PMD huge pages at stage2. > > Cc: Marc Zyngier <marc.zyngier@arm.com> > Cc: Christoffer Dall <cdall@kernel.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > arch/arm64/include/asm/stage2_pgtable.h | 8 +++++++- > arch/arm64/kvm/reset.c | 12 +++++++++++- > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/stage2_pgtable.h b/arch/arm64/include/asm/stage2_pgtable.h > index 352ec4158fdf..6a56fdff0823 100644 > --- a/arch/arm64/include/asm/stage2_pgtable.h > +++ b/arch/arm64/include/asm/stage2_pgtable.h > @@ -72,8 +72,14 @@ > /* > * The number of PTRS across all concatenated stage2 tables given by the > * number of bits resolved at the initial level. > + * If we force more number of levels than necessary, we may have more levels? > + * stage2_pgdir_shift > IPA, in which case, stage2_pgd_ptrs will have > + * one entry. > */ > -#define __s2_pgd_ptrs(ipa, lvls) (1 << ((ipa) - pt_levels_pgdir_shift((lvls)))) > +#define pgd_ptrs_shift(ipa, pgdir_shift) \ > + ((ipa) > (pgdir_shift) ? ((ipa) - (pgdir_shift)) : 0) > +#define __s2_pgd_ptrs(ipa, lvls) \ > + (1 << (pgd_ptrs_shift((ipa), pt_levels_pgdir_shift(lvls)))) > #define __s2_pgd_size(ipa, lvls) (__s2_pgd_ptrs((ipa), (lvls)) * sizeof(pgd_t)) > > #define stage2_pgd_ptrs(kvm) __s2_pgd_ptrs(kvm_phys_shift(kvm), kvm_stage2_levels(kvm)) > diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c > index 76972b19bdd7..0393bb974b23 100644 > --- a/arch/arm64/kvm/reset.c > +++ b/arch/arm64/kvm/reset.c > @@ -190,10 +190,19 @@ int kvm_arm_config_vm(struct kvm *kvm, unsigned long type) > { > u64 vtcr = VTCR_EL2_FLAGS; > u64 parange; > + u8 lvls; > > if (type) > return -EINVAL; > > + /* > + * Use a minimum 2 level page table to prevent splitting > + * host PMD huge pages at stage2. > + */ > + lvls = stage2_pgtable_levels(KVM_PHYS_SHIFT); > + if (lvls < 2) > + lvls = 2; > + > parange = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1) & 7; > if (parange > ID_AA64MMFR0_PARANGE_MAX) > parange = ID_AA64MMFR0_PARANGE_MAX; > @@ -210,7 +219,8 @@ int kvm_arm_config_vm(struct kvm *kvm, unsigned long type) > vtcr |= (kvm_get_vmid_bits() == 16) ? > VTCR_EL2_VS_16BIT : > VTCR_EL2_VS_8BIT; > - vtcr |= VTCR_EL2_LVLS_TO_SL0(stage2_pgtable_levels(KVM_PHYS_SHIFT)); > + nit: new line not requested Thanks Eric > + vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls); > vtcr |= VTCR_EL2_T0SZ(KVM_PHYS_SHIFT); > > kvm->arch.vtcr = vtcr; >
next prev parent reply other threads:[~2018-09-25 10:01 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-09-17 10:41 [PATCH v5 00/18] kvm: arm64: Dynamic IPA and 52bit IPA Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 01/18] kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 02/18] kvm: arm/arm64: Remove spurious WARN_ON Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 03/18] kvm: arm64: Add helper for loading the stage2 setting for a VM Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 04/18] arm64: Add a helper for PARange to physical shift conversion Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 05/18] kvm: arm64: Clean up VTCR_EL2 initialisation Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 06/18] kvm: arm/arm64: Allow arch specific configurations for VM Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 10:22 ` Auger Eric 2018-09-20 10:22 ` Auger Eric 2018-09-20 10:22 ` Auger Eric 2018-09-17 10:41 ` [PATCH v5 07/18] kvm: arm64: Configure VTCR_EL2 per VM Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 10:21 ` Auger Eric 2018-09-20 10:21 ` Auger Eric 2018-09-20 10:38 ` Suzuki K Poulose 2018-09-20 10:38 ` Suzuki K Poulose 2018-09-20 10:38 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 08/18] kvm: arm/arm64: Prepare for VM specific stage2 translations Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 14:07 ` Auger Eric 2018-09-20 14:07 ` Auger Eric 2018-09-20 14:07 ` Auger Eric 2018-09-17 10:41 ` [PATCH v5 09/18] kvm: arm64: Prepare for dynamic stage2 page table layout Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 10/18] kvm: arm64: Make stage2 page table layout dynamic Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 14:07 ` Auger Eric 2018-09-20 14:07 ` Auger Eric 2018-09-17 10:41 ` [PATCH v5 11/18] kvm: arm64: Dynamic configuration of VTTBR mask Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 14:07 ` Auger Eric 2018-09-20 14:07 ` Auger Eric 2018-09-20 15:22 ` Suzuki K Poulose 2018-09-20 15:22 ` Suzuki K Poulose 2018-09-20 15:22 ` Suzuki K Poulose 2018-09-25 11:56 ` Auger Eric 2018-09-25 11:56 ` Auger Eric 2018-09-17 10:41 ` [PATCH v5 12/18] kvm: arm64: Configure VTCR_EL2.SL0 per VM Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-20 14:25 ` Auger Eric 2018-09-20 14:25 ` Auger Eric 2018-09-20 15:25 ` Suzuki K Poulose 2018-09-20 15:25 ` Suzuki K Poulose 2018-09-20 15:25 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 13/18] kvm: arm64: Switch to per VM IPA limit Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 14/18] vgic: Add support for 52bit guest physical address Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-21 14:57 ` Auger Eric 2018-09-21 14:57 ` Auger Eric 2018-09-25 10:49 ` Suzuki K Poulose 2018-09-25 10:49 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 15/18] kvm: arm64: Add 52bit support for PAR to HPFAR conversoin Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-25 9:59 ` Auger Eric 2018-09-25 9:59 ` Auger Eric 2018-09-17 10:41 ` [PATCH v5 16/18] kvm: arm64: Set a limit on the IPA size Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-25 9:59 ` Auger Eric 2018-09-25 9:59 ` Auger Eric 2018-09-25 9:59 ` Auger Eric 2018-09-25 11:10 ` Suzuki K Poulose 2018-09-25 11:10 ` Suzuki K Poulose 2018-09-25 11:10 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 17/18] kvm: arm64: Limit the minimum number of page table levels Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-25 10:00 ` Auger Eric [this message] 2018-09-25 10:00 ` Auger Eric 2018-09-25 10:25 ` Suzuki K Poulose 2018-09-25 10:25 ` Suzuki K Poulose 2018-09-17 10:41 ` [PATCH v5 18/18] kvm: arm64: Allow tuning the physical address size for VM Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 14:20 ` Peter Maydell 2018-09-17 14:20 ` Peter Maydell 2018-09-17 14:43 ` Suzuki K Poulose 2018-09-17 14:43 ` Suzuki K Poulose 2018-09-18 1:55 ` Peter Maydell 2018-09-18 1:55 ` Peter Maydell 2018-09-18 1:55 ` Peter Maydell 2018-09-18 15:16 ` Suzuki K Poulose 2018-09-18 15:16 ` Suzuki K Poulose 2018-09-18 15:36 ` Peter Maydell 2018-09-18 15:36 ` Peter Maydell 2018-09-18 16:27 ` Suzuki K Poulose 2018-09-18 16:27 ` Suzuki K Poulose 2018-09-18 16:27 ` Suzuki K Poulose 2018-09-18 17:15 ` Peter Maydell 2018-09-18 17:15 ` Peter Maydell 2018-09-19 10:03 ` Suzuki K Poulose 2018-09-19 10:03 ` Suzuki K Poulose 2018-09-19 10:03 ` Suzuki K Poulose 2018-09-25 10:00 ` Auger Eric 2018-09-25 10:00 ` Auger Eric 2018-09-25 10:24 ` Suzuki K Poulose 2018-09-25 10:24 ` Suzuki K Poulose 2018-09-25 10:24 ` Suzuki K Poulose 2018-09-17 10:41 ` [kvmtool PATCH v5 19/18] kvmtool: Allow backends to run checks on the KVM device fd Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [kvmtool PATCH v5 20/18] kvmtool: arm64: Add support for guest physical address size Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [kvmtool PATCH v5 21/18] kvmtool: arm64: Switch memory layout Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` [kvmtool PATCH v5 22/18] kvmtool: arm: Add support for creating VM with PA size Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose 2018-09-17 10:41 ` Suzuki K Poulose
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