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From: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	linux-amlogic@lists.infradead.org, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/7] mmc: meson-gx: avoid clock glitch when switching to DDR modes
Date: Fri, 19 Apr 2019 10:53:18 +0200	[thread overview]
Message-ID: <5d65cc12e18f9a4b86c097fbade0cef91b3b5d9b.camel@baylibre.com> (raw)
In-Reply-To: <5b19d32be23fbe630339fd48f93b16e9301385d1.camel@baylibre.com>

On Thu, 2019-04-18 at 23:15 +0200, Jerome Brunet wrote:
> On Thu, 2019-04-18 at 22:53 +0200, Martin Blumenstingl wrote:
> > Hi Jerome,
> > 
> > On Thu, Apr 18, 2019 at 10:46 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > On Thu, 2019-04-18 at 22:16 +0200, Martin Blumenstingl wrote:
> > > > Hi Jerome,
> > > > 
> > > > On Wed, Apr 17, 2019 at 10:44 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > > > Activating DDR in the Amlogic mmc controller, among other things, will
> > > > > divide the output clock by 2. So by activating it with clock on, we are
> > > > > creating a glitch on the output.
> > > > > 
> > > > > Instead, let's deal with DDR when the clock output is off, when setting
> > > > > the clock.
> > > > > 
> > > > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > > > it seems that this patch breaks SD card on my Khadas VIM and Khadas VIM2.
> > > 
> > > The error I see in your logs is with eMMC and hs200, not SD card.
> > sorry, I should have been more clear that there are two errors:
> > eMMC, this is what I have been seeing for a while on my Khadas VIM2
> > (it's probably not related to this patch):
> >    mmc1: mmc_select_hs200 failed, error -84
> >    mmc1: error -84 whilst initialising MMC card
> 
> Following patches were also supposed to help the vim2. 
> ... something I tested numerous time on this particular board.
> 
> > however, then there's this other error:
> >    print_req_error: I/O error, dev mmcblk0, sector 0 flags 0
> >    Buffer I/O error on dev mmcblk0, logical block 0, async page read
> > as result of this the partition table cannot be read and my kernel
> > cannot find the rootfs.
> 
> I don't know what the problem is (probably some CRC error - you can check the log
> in interrupt for this) but I'm pretty sure it is not related to this patch.
> 
> I see in the log SD is indeed in HS mode, so not in any DDR mode.
> I also see that the SDIO fails as well. There something really weird, which can't
> be explained by this patch alone AFAICT.

Ok, I think I got it. It is indeed not linked to DDR, but a more trivial mistake.
It looks like a writel went AWOL during the final rebase (and after the test campaign).

in meson_mmc_set_ios, after:
val |= FIELD_PREP(CFG_BUS_WIDTH_MASK, bus_width);

Could you try adding
writel(val, host->regs + SD_EMMC_CFG);

Without this, the bus width is not changed, which explains why eMMC, SD and SDIO fail
on init.

Let me know if this helps.


WARNING: multiple messages have this Message-ID (diff)
From: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Kevin Hilman <khilman@baylibre.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-amlogic@lists.infradead.org
Subject: Re: [PATCH 5/7] mmc: meson-gx: avoid clock glitch when switching to DDR modes
Date: Fri, 19 Apr 2019 10:53:18 +0200	[thread overview]
Message-ID: <5d65cc12e18f9a4b86c097fbade0cef91b3b5d9b.camel@baylibre.com> (raw)
In-Reply-To: <5b19d32be23fbe630339fd48f93b16e9301385d1.camel@baylibre.com>

On Thu, 2019-04-18 at 23:15 +0200, Jerome Brunet wrote:
> On Thu, 2019-04-18 at 22:53 +0200, Martin Blumenstingl wrote:
> > Hi Jerome,
> > 
> > On Thu, Apr 18, 2019 at 10:46 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > On Thu, 2019-04-18 at 22:16 +0200, Martin Blumenstingl wrote:
> > > > Hi Jerome,
> > > > 
> > > > On Wed, Apr 17, 2019 at 10:44 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > > > Activating DDR in the Amlogic mmc controller, among other things, will
> > > > > divide the output clock by 2. So by activating it with clock on, we are
> > > > > creating a glitch on the output.
> > > > > 
> > > > > Instead, let's deal with DDR when the clock output is off, when setting
> > > > > the clock.
> > > > > 
> > > > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > > > it seems that this patch breaks SD card on my Khadas VIM and Khadas VIM2.
> > > 
> > > The error I see in your logs is with eMMC and hs200, not SD card.
> > sorry, I should have been more clear that there are two errors:
> > eMMC, this is what I have been seeing for a while on my Khadas VIM2
> > (it's probably not related to this patch):
> >    mmc1: mmc_select_hs200 failed, error -84
> >    mmc1: error -84 whilst initialising MMC card
> 
> Following patches were also supposed to help the vim2. 
> ... something I tested numerous time on this particular board.
> 
> > however, then there's this other error:
> >    print_req_error: I/O error, dev mmcblk0, sector 0 flags 0
> >    Buffer I/O error on dev mmcblk0, logical block 0, async page read
> > as result of this the partition table cannot be read and my kernel
> > cannot find the rootfs.
> 
> I don't know what the problem is (probably some CRC error - you can check the log
> in interrupt for this) but I'm pretty sure it is not related to this patch.
> 
> I see in the log SD is indeed in HS mode, so not in any DDR mode.
> I also see that the SDIO fails as well. There something really weird, which can't
> be explained by this patch alone AFAICT.

Ok, I think I got it. It is indeed not linked to DDR, but a more trivial mistake.
It looks like a writel went AWOL during the final rebase (and after the test campaign).

in meson_mmc_set_ios, after:
val |= FIELD_PREP(CFG_BUS_WIDTH_MASK, bus_width);

Could you try adding
writel(val, host->regs + SD_EMMC_CFG);

Without this, the bus width is not changed, which explains why eMMC, SD and SDIO fail
on init.

Let me know if this helps.


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  reply	other threads:[~2019-04-19 18:37 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-17 20:43 [PATCH 0/7] mmc: meson-gx: clean up and tuning update Jerome Brunet
2019-04-17 20:43 ` Jerome Brunet
2019-04-17 20:43 ` [PATCH 1/7] mmc: meson-gx: remove open coded read with timeout Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-18 20:18   ` Martin Blumenstingl
2019-04-18 20:18     ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 2/7] mmc: meson-gx: ack only raised irq Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-17 20:43 ` [PATCH 3/7] mmc: meson-gx: irq is not shared Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-18 19:52   ` Martin Blumenstingl
2019-04-18 19:52     ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 4/7] mmc: meson-gx: disable HS400 Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-17 20:43 ` [PATCH 5/7] mmc: meson-gx: avoid clock glitch when switching to DDR modes Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-18 20:16   ` Martin Blumenstingl
2019-04-18 20:16     ` Martin Blumenstingl
2019-04-18 20:46     ` Jerome Brunet
2019-04-18 20:46       ` Jerome Brunet
2019-04-18 20:53       ` Martin Blumenstingl
2019-04-18 20:53         ` Martin Blumenstingl
2019-04-18 21:15         ` Jerome Brunet
2019-04-18 21:15           ` Jerome Brunet
2019-04-19  8:53           ` Jerome Brunet [this message]
2019-04-19  8:53             ` Jerome Brunet
2019-04-20  9:23             ` Martin Blumenstingl
2019-04-20  9:23               ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 6/7] mmc: meson-gx: remove Rx phase tuning Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet
2019-04-17 20:43 ` [PATCH 7/7] mmc: meson-gx: add signal resampling tuning Jerome Brunet
2019-04-17 20:43   ` Jerome Brunet

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