From: xxm <xxm@rock-chips.com> To: "Pali Rohár" <pali@kernel.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, Johan Jonker <jbx6244@gmail.com>, Heiko Stuebner <heiko@sntech.de>, Peter Geis <pgwipeout@gmail.com>, Kever Yang <kever.yang@rock-chips.com>, kernel test robot <lkp@intel.com>, Shawn Lin <shawn.lin@rock-chips.com> Subject: Re: [PATCH v9 2/2] PCI: rockchip: Add Rockchip RK356X host controller driver Date: Thu, 24 Jun 2021 16:58:22 +0800 [thread overview] Message-ID: <64de9d9c-1cc9-bf6f-00c5-2360ddfa4b24@rock-chips.com> (raw) In-Reply-To: <20210624082314.mw3ilcufswmb635m@pali> Hi, 在 2021/6/24 16:23, Pali Rohár 写道: > On Thursday 24 June 2021 10:08:54 xxm wrote: >> 在 2021/6/23 22:33, Lorenzo Pieralisi 写道: >>> On Thu, May 06, 2021 at 10:35:44AM +0800, Simon Xue wrote: >>>> +static int rockchip_pcie_start_link(struct dw_pcie *pci) >>>> +{ >>>> + struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); >>>> + >>>> + /* Reset device */ >>>> + gpiod_set_value_cansleep(rockchip->rst_gpio, 0); >>>> + >>>> + rockchip_pcie_enable_ltssm(rockchip); >>>> + >>>> + /* >>>> + * PCIe requires the refclk to be stable for 100µs prior to releasing >>>> + * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI >>>> + * Express Card Electromechanical Specification, 1.1. However, we don't >>>> + * know if the refclk is coming from RC's PHY or external OSC. If it's >>>> + * from RC, so enabling LTSSM is the just right place to release #PERST. >>>> + * We need more extra time as before, rather than setting just >>>> + * 100us as we don't know how long should the device need to reset. >>>> + */ >>>> + msleep(100); >>> Any rationale behind the time chosen ? >> We found some device need about 30ms, so 100ms here just leave more room for >> other devices. > Can you share information which PCIe card needs 30ms? > > Last year I did tests with more WiFi AC cards and "the slowest" one was > Compex WLE1216 which needed about 11ms (more than 10ms). All other cards > were happy with just 1-2ms. Sorry, it was about 5 years ago, I can't find the specific card now. By the way, we also take other's upstream code "msleep(100)" as a reference. > >
WARNING: multiple messages have this Message-ID (diff)
From: xxm <xxm@rock-chips.com> To: "Pali Rohár" <pali@kernel.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, Johan Jonker <jbx6244@gmail.com>, Heiko Stuebner <heiko@sntech.de>, Peter Geis <pgwipeout@gmail.com>, Kever Yang <kever.yang@rock-chips.com>, kernel test robot <lkp@intel.com>, Shawn Lin <shawn.lin@rock-chips.com> Subject: Re: [PATCH v9 2/2] PCI: rockchip: Add Rockchip RK356X host controller driver Date: Thu, 24 Jun 2021 16:58:22 +0800 [thread overview] Message-ID: <64de9d9c-1cc9-bf6f-00c5-2360ddfa4b24@rock-chips.com> (raw) In-Reply-To: <20210624082314.mw3ilcufswmb635m@pali> Hi, 在 2021/6/24 16:23, Pali Rohár 写道: > On Thursday 24 June 2021 10:08:54 xxm wrote: >> 在 2021/6/23 22:33, Lorenzo Pieralisi 写道: >>> On Thu, May 06, 2021 at 10:35:44AM +0800, Simon Xue wrote: >>>> +static int rockchip_pcie_start_link(struct dw_pcie *pci) >>>> +{ >>>> + struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); >>>> + >>>> + /* Reset device */ >>>> + gpiod_set_value_cansleep(rockchip->rst_gpio, 0); >>>> + >>>> + rockchip_pcie_enable_ltssm(rockchip); >>>> + >>>> + /* >>>> + * PCIe requires the refclk to be stable for 100µs prior to releasing >>>> + * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI >>>> + * Express Card Electromechanical Specification, 1.1. However, we don't >>>> + * know if the refclk is coming from RC's PHY or external OSC. If it's >>>> + * from RC, so enabling LTSSM is the just right place to release #PERST. >>>> + * We need more extra time as before, rather than setting just >>>> + * 100us as we don't know how long should the device need to reset. >>>> + */ >>>> + msleep(100); >>> Any rationale behind the time chosen ? >> We found some device need about 30ms, so 100ms here just leave more room for >> other devices. > Can you share information which PCIe card needs 30ms? > > Last year I did tests with more WiFi AC cards and "the slowest" one was > Compex WLE1216 which needed about 11ms (more than 10ms). All other cards > were happy with just 1-2ms. Sorry, it was about 5 years ago, I can't find the specific card now. By the way, we also take other's upstream code "msleep(100)" as a reference. > > _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2021-06-24 8:58 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-06 2:34 [PATCH v9 1/2] dt-bindings: rockchip: Add DesignWare based PCIe controller Simon Xue 2021-05-06 2:34 ` Simon Xue 2021-05-06 2:35 ` [PATCH v9 2/2] PCI: rockchip: Add Rockchip RK356X host controller driver Simon Xue 2021-05-06 2:35 ` Simon Xue 2021-06-23 14:33 ` Lorenzo Pieralisi 2021-06-23 14:33 ` Lorenzo Pieralisi 2021-06-24 2:08 ` xxm 2021-06-24 2:08 ` xxm 2021-06-24 8:23 ` Pali Rohár 2021-06-24 8:23 ` Pali Rohár 2021-06-24 8:58 ` xxm [this message] 2021-06-24 8:58 ` xxm 2021-06-23 21:15 ` Rob Herring 2021-06-23 21:15 ` Rob Herring 2021-10-27 15:41 ` [PATCH v9 1/2] dt-bindings: rockchip: Add DesignWare based PCIe controller Rob Herring 2021-10-27 15:41 ` Rob Herring
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