From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Frank Wunderlich <frank-w@public-files.de>,
"Thierry Reding" <treding@nvidia.com>,
Thomas Gleixner <tglx@linutronix.de>,
"Rob Herring" <robh@kernel.org>, Will Deacon <will@kernel.org>,
"K. Y. Srinivasan" <kys@microsoft.com>,
Haiyang Zhang <haiyangz@microsoft.com>,
"Stephen Hemminger" <sthemmin@microsoft.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Michal Simek <michal.simek@xilinx.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Bharat Kumar Gogada <bharatku@xilinx.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-hyperv@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-renesas-soc@vger.kernel.org>, <kernel-team@android.com>
Subject: Re: [PATCH v3 01/14] PCI: tegra: Convert to MSI domains
Date: Tue, 20 Apr 2021 13:45:55 +0100 [thread overview]
Message-ID: <67ecea13-3036-0d2d-fa89-46f896a06693@nvidia.com> (raw)
In-Reply-To: <87fszlqria.wl-maz@kernel.org>
Hi Marc,
On 20/04/2021 09:39, Marc Zyngier wrote:
...
> The following should hopefully cure it (compile tested only). Please
> let me know.
>
> M.
>
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index eaba7b2fab4a..507b23d43ad1 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -1802,13 +1802,19 @@ static void tegra_pcie_enable_msi(struct tegra_pcie *pcie)
> {
> const struct tegra_pcie_soc *soc = pcie->soc;
> struct tegra_msi *msi = &pcie->msi;
> - u32 reg;
> + u32 reg, msi_state[INT_PCI_MSI_NR / 32];
> + int i;
>
> afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
> afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST);
> /* this register is in 4K increments */
> afi_writel(pcie, 1, AFI_MSI_BAR_SZ);
>
> + /* Restore the MSI allocation state */
> + bitmap_to_arr32(msi_state, msi->used, INT_PCI_MSI_NR);
> + for (i = 0; i < ARRAY_SIZE(msi_state); i++)
> + afi_writel(pcie, msi_state[i], AFI_MSI_EN_VEC(i));
> +
> /* and unmask the MSI interrupt */
> reg = afi_readl(pcie, AFI_INTR_MASK);
> reg |= AFI_INTR_MASK_MSI_MASK;
>
Thanks, that does fix it indeed!
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Cheers
Jon
--
nvpublic
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Frank Wunderlich <frank-w@public-files.de>,
"Thierry Reding" <treding@nvidia.com>,
Thomas Gleixner <tglx@linutronix.de>,
"Rob Herring" <robh@kernel.org>, Will Deacon <will@kernel.org>,
"K. Y. Srinivasan" <kys@microsoft.com>,
Haiyang Zhang <haiyangz@microsoft.com>,
"Stephen Hemminger" <sthemmin@microsoft.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Michal Simek <michal.simek@xilinx.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Bharat Kumar Gogada <bharatku@xilinx.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-hyperv@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-renesas-soc@vger.kernel.org>, <kernel-team@android.com>
Subject: Re: [PATCH v3 01/14] PCI: tegra: Convert to MSI domains
Date: Tue, 20 Apr 2021 13:45:55 +0100 [thread overview]
Message-ID: <67ecea13-3036-0d2d-fa89-46f896a06693@nvidia.com> (raw)
In-Reply-To: <87fszlqria.wl-maz@kernel.org>
Hi Marc,
On 20/04/2021 09:39, Marc Zyngier wrote:
...
> The following should hopefully cure it (compile tested only). Please
> let me know.
>
> M.
>
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index eaba7b2fab4a..507b23d43ad1 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -1802,13 +1802,19 @@ static void tegra_pcie_enable_msi(struct tegra_pcie *pcie)
> {
> const struct tegra_pcie_soc *soc = pcie->soc;
> struct tegra_msi *msi = &pcie->msi;
> - u32 reg;
> + u32 reg, msi_state[INT_PCI_MSI_NR / 32];
> + int i;
>
> afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
> afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST);
> /* this register is in 4K increments */
> afi_writel(pcie, 1, AFI_MSI_BAR_SZ);
>
> + /* Restore the MSI allocation state */
> + bitmap_to_arr32(msi_state, msi->used, INT_PCI_MSI_NR);
> + for (i = 0; i < ARRAY_SIZE(msi_state); i++)
> + afi_writel(pcie, msi_state[i], AFI_MSI_EN_VEC(i));
> +
> /* and unmask the MSI interrupt */
> reg = afi_readl(pcie, AFI_INTR_MASK);
> reg |= AFI_INTR_MASK_MSI_MASK;
>
Thanks, that does fix it indeed!
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Cheers
Jon
--
nvpublic
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Frank Wunderlich <frank-w@public-files.de>,
"Thierry Reding" <treding@nvidia.com>,
Thomas Gleixner <tglx@linutronix.de>,
"Rob Herring" <robh@kernel.org>, Will Deacon <will@kernel.org>,
"K. Y. Srinivasan" <kys@microsoft.com>,
Haiyang Zhang <haiyangz@microsoft.com>,
"Stephen Hemminger" <sthemmin@microsoft.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Michal Simek <michal.simek@xilinx.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Bharat Kumar Gogada <bharatku@xilinx.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-hyperv@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-renesas-soc@vger.kernel.org>, <kernel-team@android.com>
Subject: Re: [PATCH v3 01/14] PCI: tegra: Convert to MSI domains
Date: Tue, 20 Apr 2021 13:45:55 +0100 [thread overview]
Message-ID: <67ecea13-3036-0d2d-fa89-46f896a06693@nvidia.com> (raw)
In-Reply-To: <87fszlqria.wl-maz@kernel.org>
Hi Marc,
On 20/04/2021 09:39, Marc Zyngier wrote:
...
> The following should hopefully cure it (compile tested only). Please
> let me know.
>
> M.
>
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index eaba7b2fab4a..507b23d43ad1 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -1802,13 +1802,19 @@ static void tegra_pcie_enable_msi(struct tegra_pcie *pcie)
> {
> const struct tegra_pcie_soc *soc = pcie->soc;
> struct tegra_msi *msi = &pcie->msi;
> - u32 reg;
> + u32 reg, msi_state[INT_PCI_MSI_NR / 32];
> + int i;
>
> afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
> afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST);
> /* this register is in 4K increments */
> afi_writel(pcie, 1, AFI_MSI_BAR_SZ);
>
> + /* Restore the MSI allocation state */
> + bitmap_to_arr32(msi_state, msi->used, INT_PCI_MSI_NR);
> + for (i = 0; i < ARRAY_SIZE(msi_state); i++)
> + afi_writel(pcie, msi_state[i], AFI_MSI_EN_VEC(i));
> +
> /* and unmask the MSI interrupt */
> reg = afi_readl(pcie, AFI_INTR_MASK);
> reg |= AFI_INTR_MASK_MSI_MASK;
>
Thanks, that does fix it indeed!
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Cheers
Jon
--
nvpublic
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-20 12:46 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-30 15:11 [PATCH v3 00/14] PCI/MSI: Getting rid of msi_controller, and other cleanups Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 01/14] PCI: tegra: Convert to MSI domains Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-04-19 19:19 ` Jon Hunter
2021-04-19 19:19 ` Jon Hunter
2021-04-19 19:19 ` Jon Hunter
2021-04-19 20:02 ` Jon Hunter
2021-04-19 20:02 ` Jon Hunter
2021-04-19 20:02 ` Jon Hunter
2021-04-20 8:39 ` Marc Zyngier
2021-04-20 8:39 ` Marc Zyngier
2021-04-20 12:45 ` Jon Hunter [this message]
2021-04-20 12:45 ` Jon Hunter
2021-04-20 12:45 ` Jon Hunter
2021-03-30 15:11 ` [PATCH v3 02/14] PCI: rcar: Don't allocate extra memory for the MSI capture address Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:28 ` Lorenzo Pieralisi
2021-03-30 15:28 ` Lorenzo Pieralisi
2021-03-30 15:28 ` Lorenzo Pieralisi
2021-04-01 10:59 ` Yoshihiro Shimoda
2021-04-01 10:59 ` Yoshihiro Shimoda
2021-04-01 10:59 ` Yoshihiro Shimoda
2021-03-30 15:11 ` [PATCH v3 03/14] PCI: rcar: Convert to MSI domains Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-04-01 10:19 ` Lorenzo Pieralisi
2021-04-01 10:19 ` Lorenzo Pieralisi
2021-04-01 10:19 ` Lorenzo Pieralisi
2021-04-01 10:38 ` Marc Zyngier
2021-04-01 10:38 ` Marc Zyngier
2021-04-01 10:38 ` Marc Zyngier
2021-04-01 11:03 ` Lorenzo Pieralisi
2021-04-01 11:03 ` Lorenzo Pieralisi
2021-04-01 11:03 ` Lorenzo Pieralisi
2021-03-30 15:11 ` [PATCH v3 04/14] PCI: xilinx: Don't allocate extra memory for the MSI capture address Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 05/14] PCI: xilinx: Convert to MSI domains Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 06/14] PCI: hv: Drop msi_controller structure Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 07/14] PCI/MSI: Drop use of msi_controller from core code Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 08/14] PCI/MSI: Kill msi_controller structure Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 09/14] PCI/MSI: Kill default_teardown_msi_irqs() Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 10/14] PCI/MSI: Let PCI host bridges declare their reliance on MSI domains Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 11/14] PCI/MSI: Make pci_host_common_probe() declare its " Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 12/14] PCI: mediatek: Advertise lack of built-in MSI handling Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 13/14] PCI/MSI: Document the various ways of ending up with NO_MSI Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-05-18 4:28 ` Jeremy Linton
2021-05-18 4:28 ` Jeremy Linton
2021-05-18 4:28 ` Jeremy Linton
2021-05-18 8:59 ` Marc Zyngier
2021-05-18 8:59 ` Marc Zyngier
2021-05-18 8:59 ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 14/14] PCI: Refactor HT advertising of NO_MSI flag Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-03-30 15:11 ` Marc Zyngier
2021-04-01 11:27 ` [PATCH v3 00/14] PCI/MSI: Getting rid of msi_controller, and other cleanups Lorenzo Pieralisi
2021-04-01 11:27 ` Lorenzo Pieralisi
2021-04-01 11:27 ` Lorenzo Pieralisi
2021-04-01 12:07 ` Marc Zyngier
2021-04-01 12:07 ` Marc Zyngier
2021-04-01 12:07 ` Marc Zyngier
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