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From: Yong Wu <yong.wu@mediatek.com>
To: AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	"Robin Murphy" <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <youlin.pei@mediatek.com>,
	<anan.sun@mediatek.com>, <chao.hao@mediatek.com>,
	<yen-chang.chen@mediatek.com>
Subject: Re: [PATCH v3 22/33] iommu/mediatek: Add PCIe support
Date: Sun, 9 Jan 2022 10:47:46 +0800	[thread overview]
Message-ID: <694747210c8da8ae4fc282cd90152e5c81945da5.camel@mediatek.com> (raw)
In-Reply-To: <3b5e7072-0935-4383-27a1-dd8d623cc608@collabora.com>

On Tue, 2022-01-04 at 16:54 +0100, AngeloGioacchino Del Regno wrote:
> Il 23/09/21 13:58, Yong Wu ha scritto:
> > Currently the code for of_iommu_configure_dev_id is like this:
> > 
> > static int of_iommu_configure_dev_id(struct device_node *master_np,
> >                                       struct device *dev,
> >                                       const u32 *id)
> > {
> >         struct of_phandle_args iommu_spec = { .args_count = 1 };
> > 
> >         err = of_map_id(master_np, *id, "iommu-map",
> >                         "iommu-map-mask", &iommu_spec.np,
> >                         iommu_spec.args);
> > ...
> > }
> > 
> > It supports only one id output. BUT our PCIe HW has two ID(one is
> > for
> > writing, the other is for reading). I'm not sure if we should
> > change
> > of_map_id to support output MAX_PHANDLE_ARGS.
> > 
> > Here add the solution in ourselve drivers. If it's pcie case,
> > enable one
> > more bit.
> > 
> > Not all infra iommu support PCIe, thus add a PCIe support flag
> > here.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >   drivers/iommu/mtk_iommu.c | 21 ++++++++++++++++++++-
> >   1 file changed, 20 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index 37d6dfb4feab..3f1fd8036345 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -20,6 +20,7 @@
> >   #include <linux/of_address.h>
> >   #include <linux/of_irq.h>
> >   #include <linux/of_platform.h>
> > +#include <linux/pci.h>
> >   #include <linux/platform_device.h>
> >   #include <linux/pm_runtime.h>
> >   #include <linux/regmap.h>
> > @@ -132,6 +133,7 @@
> >   #define MTK_IOMMU_TYPE_MM		(0x0 << 13)
> >   #define MTK_IOMMU_TYPE_INFRA		(0x1 << 13)
> >   #define MTK_IOMMU_TYPE_MASK		(0x3 << 13)
> > +#define IFA_IOMMU_PCIe_SUPPORT		BIT(15)
> 
> This definition looks like "breaking" the naming convention that's
> used in this
> driver... what about MTK_INFRA_IOMMU_PCIE_SUPPORT?

OK for me. I noticed the "PCIE" should called to "PCIe", thus renamed
this.

> 
> >   
> >   #define MTK_IOMMU_HAS_FLAG(pdata, _x)	(!!(((pdata)->flags) &
> > (_x)))
> >   
> > @@ -401,8 +403,11 @@ static int mtk_iommu_config(struct
> > mtk_iommu_data *data, struct device *dev,
> >   				larb_mmu->mmu &=
> > ~MTK_SMI_MMU_EN(portid);
> >   		} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA)) {
> >   			peri_mmuen_msk = BIT(portid);
> > -			peri_mmuen = enable ? peri_mmuen_msk : 0;
> > +			/* PCIdev has only one output id, enable the
> > next writing bit for PCIe */
> > +			if (dev_is_pci(dev))
> > +				peri_mmuen_msk |= BIT(portid + 1);
> >   
> > +			peri_mmuen = enable ? peri_mmuen_msk : 0;
> >   			ret = regmap_update_bits(data->pericfg,
> > PERICFG_IOMMU_1,
> >   						 peri_mmuen_msk,
> > peri_mmuen);
> >   			if (ret)
> > @@ -977,6 +982,15 @@ static int mtk_iommu_probe(struct
> > platform_device *pdev)
> >   		ret = component_master_add_with_match(dev,
> > &mtk_iommu_com_ops, match);
> >   		if (ret)
> >   			goto out_bus_set_null;
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> Please fix the indentation of this ifdef (do not indent).

Thanks. Will fix this.

> 
> > +		if (!iommu_present(&pci_bus_type)) {
> > +			ret = bus_set_iommu(&pci_bus_type,
> > &mtk_iommu_ops);
> > +			if (ret) /* PCIe fail don't affect
> > platform_bus. */
> > +				goto out_list_del;
> > +		}
> > +		#endif
> >   	}
> >   	return ret;
> >   
> > @@ -1007,6 +1021,11 @@ static int mtk_iommu_remove(struct
> > platform_device *pdev)
> >   	if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
> >   		device_link_remove(data->smicomm_dev, &pdev->dev);
> >   		component_master_del(&pdev->dev, &mtk_iommu_com_ops);
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> ditto.
> 
> > +		bus_set_iommu(&pci_bus_type, NULL);
> > +		#endif
> >   	}
> >   	pm_runtime_disable(&pdev->dev);
> >   	devm_free_irq(&pdev->dev, data->irq, data);
> > 
> 
> 


WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	"Robin Murphy" <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	srv_heupstream@mediatek.com,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	linux-kernel@vger.kernel.org, yen-chang.chen@mediatek.com,
	chao.hao@mediatek.com, iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 22/33] iommu/mediatek: Add PCIe support
Date: Sun, 9 Jan 2022 10:47:46 +0800	[thread overview]
Message-ID: <694747210c8da8ae4fc282cd90152e5c81945da5.camel@mediatek.com> (raw)
In-Reply-To: <3b5e7072-0935-4383-27a1-dd8d623cc608@collabora.com>

On Tue, 2022-01-04 at 16:54 +0100, AngeloGioacchino Del Regno wrote:
> Il 23/09/21 13:58, Yong Wu ha scritto:
> > Currently the code for of_iommu_configure_dev_id is like this:
> > 
> > static int of_iommu_configure_dev_id(struct device_node *master_np,
> >                                       struct device *dev,
> >                                       const u32 *id)
> > {
> >         struct of_phandle_args iommu_spec = { .args_count = 1 };
> > 
> >         err = of_map_id(master_np, *id, "iommu-map",
> >                         "iommu-map-mask", &iommu_spec.np,
> >                         iommu_spec.args);
> > ...
> > }
> > 
> > It supports only one id output. BUT our PCIe HW has two ID(one is
> > for
> > writing, the other is for reading). I'm not sure if we should
> > change
> > of_map_id to support output MAX_PHANDLE_ARGS.
> > 
> > Here add the solution in ourselve drivers. If it's pcie case,
> > enable one
> > more bit.
> > 
> > Not all infra iommu support PCIe, thus add a PCIe support flag
> > here.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >   drivers/iommu/mtk_iommu.c | 21 ++++++++++++++++++++-
> >   1 file changed, 20 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index 37d6dfb4feab..3f1fd8036345 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -20,6 +20,7 @@
> >   #include <linux/of_address.h>
> >   #include <linux/of_irq.h>
> >   #include <linux/of_platform.h>
> > +#include <linux/pci.h>
> >   #include <linux/platform_device.h>
> >   #include <linux/pm_runtime.h>
> >   #include <linux/regmap.h>
> > @@ -132,6 +133,7 @@
> >   #define MTK_IOMMU_TYPE_MM		(0x0 << 13)
> >   #define MTK_IOMMU_TYPE_INFRA		(0x1 << 13)
> >   #define MTK_IOMMU_TYPE_MASK		(0x3 << 13)
> > +#define IFA_IOMMU_PCIe_SUPPORT		BIT(15)
> 
> This definition looks like "breaking" the naming convention that's
> used in this
> driver... what about MTK_INFRA_IOMMU_PCIE_SUPPORT?

OK for me. I noticed the "PCIE" should called to "PCIe", thus renamed
this.

> 
> >   
> >   #define MTK_IOMMU_HAS_FLAG(pdata, _x)	(!!(((pdata)->flags) &
> > (_x)))
> >   
> > @@ -401,8 +403,11 @@ static int mtk_iommu_config(struct
> > mtk_iommu_data *data, struct device *dev,
> >   				larb_mmu->mmu &=
> > ~MTK_SMI_MMU_EN(portid);
> >   		} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA)) {
> >   			peri_mmuen_msk = BIT(portid);
> > -			peri_mmuen = enable ? peri_mmuen_msk : 0;
> > +			/* PCIdev has only one output id, enable the
> > next writing bit for PCIe */
> > +			if (dev_is_pci(dev))
> > +				peri_mmuen_msk |= BIT(portid + 1);
> >   
> > +			peri_mmuen = enable ? peri_mmuen_msk : 0;
> >   			ret = regmap_update_bits(data->pericfg,
> > PERICFG_IOMMU_1,
> >   						 peri_mmuen_msk,
> > peri_mmuen);
> >   			if (ret)
> > @@ -977,6 +982,15 @@ static int mtk_iommu_probe(struct
> > platform_device *pdev)
> >   		ret = component_master_add_with_match(dev,
> > &mtk_iommu_com_ops, match);
> >   		if (ret)
> >   			goto out_bus_set_null;
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> Please fix the indentation of this ifdef (do not indent).

Thanks. Will fix this.

> 
> > +		if (!iommu_present(&pci_bus_type)) {
> > +			ret = bus_set_iommu(&pci_bus_type,
> > &mtk_iommu_ops);
> > +			if (ret) /* PCIe fail don't affect
> > platform_bus. */
> > +				goto out_list_del;
> > +		}
> > +		#endif
> >   	}
> >   	return ret;
> >   
> > @@ -1007,6 +1021,11 @@ static int mtk_iommu_remove(struct
> > platform_device *pdev)
> >   	if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
> >   		device_link_remove(data->smicomm_dev, &pdev->dev);
> >   		component_master_del(&pdev->dev, &mtk_iommu_com_ops);
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> ditto.
> 
> > +		bus_set_iommu(&pci_bus_type, NULL);
> > +		#endif
> >   	}
> >   	pm_runtime_disable(&pdev->dev);
> >   	devm_free_irq(&pdev->dev, data->irq, data);
> > 
> 
> 

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	"Robin Murphy" <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <youlin.pei@mediatek.com>,
	<anan.sun@mediatek.com>, <chao.hao@mediatek.com>,
	<yen-chang.chen@mediatek.com>
Subject: Re: [PATCH v3 22/33] iommu/mediatek: Add PCIe support
Date: Sun, 9 Jan 2022 10:47:46 +0800	[thread overview]
Message-ID: <694747210c8da8ae4fc282cd90152e5c81945da5.camel@mediatek.com> (raw)
In-Reply-To: <3b5e7072-0935-4383-27a1-dd8d623cc608@collabora.com>

On Tue, 2022-01-04 at 16:54 +0100, AngeloGioacchino Del Regno wrote:
> Il 23/09/21 13:58, Yong Wu ha scritto:
> > Currently the code for of_iommu_configure_dev_id is like this:
> > 
> > static int of_iommu_configure_dev_id(struct device_node *master_np,
> >                                       struct device *dev,
> >                                       const u32 *id)
> > {
> >         struct of_phandle_args iommu_spec = { .args_count = 1 };
> > 
> >         err = of_map_id(master_np, *id, "iommu-map",
> >                         "iommu-map-mask", &iommu_spec.np,
> >                         iommu_spec.args);
> > ...
> > }
> > 
> > It supports only one id output. BUT our PCIe HW has two ID(one is
> > for
> > writing, the other is for reading). I'm not sure if we should
> > change
> > of_map_id to support output MAX_PHANDLE_ARGS.
> > 
> > Here add the solution in ourselve drivers. If it's pcie case,
> > enable one
> > more bit.
> > 
> > Not all infra iommu support PCIe, thus add a PCIe support flag
> > here.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >   drivers/iommu/mtk_iommu.c | 21 ++++++++++++++++++++-
> >   1 file changed, 20 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index 37d6dfb4feab..3f1fd8036345 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -20,6 +20,7 @@
> >   #include <linux/of_address.h>
> >   #include <linux/of_irq.h>
> >   #include <linux/of_platform.h>
> > +#include <linux/pci.h>
> >   #include <linux/platform_device.h>
> >   #include <linux/pm_runtime.h>
> >   #include <linux/regmap.h>
> > @@ -132,6 +133,7 @@
> >   #define MTK_IOMMU_TYPE_MM		(0x0 << 13)
> >   #define MTK_IOMMU_TYPE_INFRA		(0x1 << 13)
> >   #define MTK_IOMMU_TYPE_MASK		(0x3 << 13)
> > +#define IFA_IOMMU_PCIe_SUPPORT		BIT(15)
> 
> This definition looks like "breaking" the naming convention that's
> used in this
> driver... what about MTK_INFRA_IOMMU_PCIE_SUPPORT?

OK for me. I noticed the "PCIE" should called to "PCIe", thus renamed
this.

> 
> >   
> >   #define MTK_IOMMU_HAS_FLAG(pdata, _x)	(!!(((pdata)->flags) &
> > (_x)))
> >   
> > @@ -401,8 +403,11 @@ static int mtk_iommu_config(struct
> > mtk_iommu_data *data, struct device *dev,
> >   				larb_mmu->mmu &=
> > ~MTK_SMI_MMU_EN(portid);
> >   		} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA)) {
> >   			peri_mmuen_msk = BIT(portid);
> > -			peri_mmuen = enable ? peri_mmuen_msk : 0;
> > +			/* PCIdev has only one output id, enable the
> > next writing bit for PCIe */
> > +			if (dev_is_pci(dev))
> > +				peri_mmuen_msk |= BIT(portid + 1);
> >   
> > +			peri_mmuen = enable ? peri_mmuen_msk : 0;
> >   			ret = regmap_update_bits(data->pericfg,
> > PERICFG_IOMMU_1,
> >   						 peri_mmuen_msk,
> > peri_mmuen);
> >   			if (ret)
> > @@ -977,6 +982,15 @@ static int mtk_iommu_probe(struct
> > platform_device *pdev)
> >   		ret = component_master_add_with_match(dev,
> > &mtk_iommu_com_ops, match);
> >   		if (ret)
> >   			goto out_bus_set_null;
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> Please fix the indentation of this ifdef (do not indent).

Thanks. Will fix this.

> 
> > +		if (!iommu_present(&pci_bus_type)) {
> > +			ret = bus_set_iommu(&pci_bus_type,
> > &mtk_iommu_ops);
> > +			if (ret) /* PCIe fail don't affect
> > platform_bus. */
> > +				goto out_list_del;
> > +		}
> > +		#endif
> >   	}
> >   	return ret;
> >   
> > @@ -1007,6 +1021,11 @@ static int mtk_iommu_remove(struct
> > platform_device *pdev)
> >   	if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
> >   		device_link_remove(data->smicomm_dev, &pdev->dev);
> >   		component_master_del(&pdev->dev, &mtk_iommu_com_ops);
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> ditto.
> 
> > +		bus_set_iommu(&pci_bus_type, NULL);
> > +		#endif
> >   	}
> >   	pm_runtime_disable(&pdev->dev);
> >   	devm_free_irq(&pdev->dev, data->irq, data);
> > 
> 
> 
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	"Robin Murphy" <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <youlin.pei@mediatek.com>,
	<anan.sun@mediatek.com>, <chao.hao@mediatek.com>,
	<yen-chang.chen@mediatek.com>
Subject: Re: [PATCH v3 22/33] iommu/mediatek: Add PCIe support
Date: Sun, 9 Jan 2022 10:47:46 +0800	[thread overview]
Message-ID: <694747210c8da8ae4fc282cd90152e5c81945da5.camel@mediatek.com> (raw)
In-Reply-To: <3b5e7072-0935-4383-27a1-dd8d623cc608@collabora.com>

On Tue, 2022-01-04 at 16:54 +0100, AngeloGioacchino Del Regno wrote:
> Il 23/09/21 13:58, Yong Wu ha scritto:
> > Currently the code for of_iommu_configure_dev_id is like this:
> > 
> > static int of_iommu_configure_dev_id(struct device_node *master_np,
> >                                       struct device *dev,
> >                                       const u32 *id)
> > {
> >         struct of_phandle_args iommu_spec = { .args_count = 1 };
> > 
> >         err = of_map_id(master_np, *id, "iommu-map",
> >                         "iommu-map-mask", &iommu_spec.np,
> >                         iommu_spec.args);
> > ...
> > }
> > 
> > It supports only one id output. BUT our PCIe HW has two ID(one is
> > for
> > writing, the other is for reading). I'm not sure if we should
> > change
> > of_map_id to support output MAX_PHANDLE_ARGS.
> > 
> > Here add the solution in ourselve drivers. If it's pcie case,
> > enable one
> > more bit.
> > 
> > Not all infra iommu support PCIe, thus add a PCIe support flag
> > here.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >   drivers/iommu/mtk_iommu.c | 21 ++++++++++++++++++++-
> >   1 file changed, 20 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index 37d6dfb4feab..3f1fd8036345 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -20,6 +20,7 @@
> >   #include <linux/of_address.h>
> >   #include <linux/of_irq.h>
> >   #include <linux/of_platform.h>
> > +#include <linux/pci.h>
> >   #include <linux/platform_device.h>
> >   #include <linux/pm_runtime.h>
> >   #include <linux/regmap.h>
> > @@ -132,6 +133,7 @@
> >   #define MTK_IOMMU_TYPE_MM		(0x0 << 13)
> >   #define MTK_IOMMU_TYPE_INFRA		(0x1 << 13)
> >   #define MTK_IOMMU_TYPE_MASK		(0x3 << 13)
> > +#define IFA_IOMMU_PCIe_SUPPORT		BIT(15)
> 
> This definition looks like "breaking" the naming convention that's
> used in this
> driver... what about MTK_INFRA_IOMMU_PCIE_SUPPORT?

OK for me. I noticed the "PCIE" should called to "PCIe", thus renamed
this.

> 
> >   
> >   #define MTK_IOMMU_HAS_FLAG(pdata, _x)	(!!(((pdata)->flags) &
> > (_x)))
> >   
> > @@ -401,8 +403,11 @@ static int mtk_iommu_config(struct
> > mtk_iommu_data *data, struct device *dev,
> >   				larb_mmu->mmu &=
> > ~MTK_SMI_MMU_EN(portid);
> >   		} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA)) {
> >   			peri_mmuen_msk = BIT(portid);
> > -			peri_mmuen = enable ? peri_mmuen_msk : 0;
> > +			/* PCIdev has only one output id, enable the
> > next writing bit for PCIe */
> > +			if (dev_is_pci(dev))
> > +				peri_mmuen_msk |= BIT(portid + 1);
> >   
> > +			peri_mmuen = enable ? peri_mmuen_msk : 0;
> >   			ret = regmap_update_bits(data->pericfg,
> > PERICFG_IOMMU_1,
> >   						 peri_mmuen_msk,
> > peri_mmuen);
> >   			if (ret)
> > @@ -977,6 +982,15 @@ static int mtk_iommu_probe(struct
> > platform_device *pdev)
> >   		ret = component_master_add_with_match(dev,
> > &mtk_iommu_com_ops, match);
> >   		if (ret)
> >   			goto out_bus_set_null;
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> Please fix the indentation of this ifdef (do not indent).

Thanks. Will fix this.

> 
> > +		if (!iommu_present(&pci_bus_type)) {
> > +			ret = bus_set_iommu(&pci_bus_type,
> > &mtk_iommu_ops);
> > +			if (ret) /* PCIe fail don't affect
> > platform_bus. */
> > +				goto out_list_del;
> > +		}
> > +		#endif
> >   	}
> >   	return ret;
> >   
> > @@ -1007,6 +1021,11 @@ static int mtk_iommu_remove(struct
> > platform_device *pdev)
> >   	if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
> >   		device_link_remove(data->smicomm_dev, &pdev->dev);
> >   		component_master_del(&pdev->dev, &mtk_iommu_com_ops);
> > +	} else if (MTK_IOMMU_IS_TYPE(data->plat_data,
> > MTK_IOMMU_TYPE_INFRA) &&
> > +		   MTK_IOMMU_HAS_FLAG(data->plat_data,
> > IFA_IOMMU_PCIe_SUPPORT)) {
> > +		#ifdef CONFIG_PCI
> 
> ditto.
> 
> > +		bus_set_iommu(&pci_bus_type, NULL);
> > +		#endif
> >   	}
> >   	pm_runtime_disable(&pdev->dev);
> >   	devm_free_irq(&pdev->dev, data->irq, data);
> > 
> 
> 
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  reply	other threads:[~2022-01-09  2:47 UTC|newest]

Thread overview: 317+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-23 11:58 [PATCH v3 00/33] MT8195 IOMMU SUPPORT Yong Wu
2021-09-23 11:58 ` Yong Wu
2021-09-23 11:58 ` Yong Wu
2021-09-23 11:58 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 01/33] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 02/33] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 03/33] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 04/33] iommu/mediatek: Remove clk_disable in mtk_iommu_remove Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 05/33] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 06/33] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 07/33] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 08/33] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 09/33] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-09  2:48     ` Yong Wu
2022-01-09  2:48       ` Yong Wu
2022-01-09  2:48       ` Yong Wu
2022-01-09  2:48       ` Yong Wu
2022-01-10  9:16       ` AngeloGioacchino Del Regno
2022-01-10  9:16         ` AngeloGioacchino Del Regno
2022-01-10  9:16         ` AngeloGioacchino Del Regno
2022-01-10  9:16         ` AngeloGioacchino Del Regno
2022-01-10 10:59         ` Yong Wu
2022-01-10 10:59           ` Yong Wu
2022-01-10 10:59           ` Yong Wu
2022-01-10 10:59           ` Yong Wu
2022-01-10 11:40           ` AngeloGioacchino Del Regno
2022-01-10 11:40             ` AngeloGioacchino Del Regno
2022-01-10 11:40             ` AngeloGioacchino Del Regno
2022-01-10 11:40             ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 10/33] iommu/mediatek: Add tlb_lock in tlb_flush_all Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 11/33] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 12/33] iommu/mediatek: Always tlb_flush_all when each PM resume Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-11-09 12:21   ` Dafna Hirschfeld
2021-11-09 12:21     ` Dafna Hirschfeld
2021-11-09 12:21     ` Dafna Hirschfeld
2021-11-09 12:21     ` Dafna Hirschfeld
2021-11-10  2:20     ` Yong Wu
2021-11-10  2:20       ` Yong Wu
2021-11-10  2:20       ` Yong Wu
2021-11-10  2:20       ` Yong Wu
2021-11-10  5:29       ` Dafna Hirschfeld
2021-11-10  5:29         ` Dafna Hirschfeld
2021-11-10  5:29         ` Dafna Hirschfeld
2021-11-10  5:29         ` Dafna Hirschfeld
2021-11-10  7:50         ` Yong Wu
2021-11-10  7:50           ` Yong Wu
2021-11-10  7:50           ` Yong Wu
2021-11-22  7:05           ` Yong Wu
2021-11-22  7:05             ` Yong Wu
2021-11-22  7:05             ` Yong Wu
2021-11-22 11:08             ` Dafna Hirschfeld
2021-11-22 11:08               ` Dafna Hirschfeld
2021-11-22 11:08               ` Dafna Hirschfeld
2021-11-27 10:11           ` Dafna Hirschfeld
2021-11-27 10:11             ` Dafna Hirschfeld
2021-11-27 10:11             ` Dafna Hirschfeld
2021-11-30  7:39             ` Yong Wu
2021-11-30  7:39               ` Yong Wu
2021-11-30  7:39               ` Yong Wu
2021-11-30 11:33               ` Dafna Hirschfeld
2021-11-30 11:33                 ` Dafna Hirschfeld
2021-11-30 11:33                 ` Dafna Hirschfeld
2021-12-06  8:28                 ` Yong Wu
2021-12-06  8:28                   ` Yong Wu
2021-12-06  8:28                   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 13/33] iommu/mediatek: Remove the power status checking in tlb flush all Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-10-22 14:03   ` Dafna Hirschfeld
2021-10-22 14:03     ` Dafna Hirschfeld
2021-10-22 14:03     ` Dafna Hirschfeld
2021-10-22 14:03     ` Dafna Hirschfeld
2021-10-25  4:03     ` Yong Wu
2021-10-25  4:03       ` Yong Wu
2021-10-25  4:03       ` Yong Wu
2021-10-25  4:03       ` Yong Wu
2021-11-04  3:28       ` Yong Wu
2021-11-04  3:28         ` Yong Wu
2021-11-04  3:28         ` Yong Wu
2021-11-04  3:28         ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-09  2:47     ` Yong Wu
2022-01-09  2:47       ` Yong Wu
2022-01-09  2:47       ` Yong Wu
2022-01-09  2:47       ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 14/33] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 15/33] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 16/33] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 17/33] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 18/33] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 19/33] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:55   ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2022-01-04 15:55     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 20/33] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 21/33] iommu/mediatek: Add infra iommu support Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 22/33] iommu/mediatek: Add PCIe support Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-09  2:47     ` Yong Wu [this message]
2022-01-09  2:47       ` Yong Wu
2022-01-09  2:47       ` Yong Wu
2022-01-09  2:47       ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 23/33] iommu/mediatek: Add mt8195 support Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 24/33] iommu/mediatek: Only adjust code about register base Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 25/33] iommu/mediatek: Just move code position in hw_init Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:53   ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 26/33] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:53   ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-09  2:46     ` Yong Wu
2022-01-09  2:46       ` Yong Wu
2022-01-09  2:46       ` Yong Wu
2022-01-09  2:46       ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 27/33] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:54   ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2022-01-04 15:54     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 28/33] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:53   ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 29/33] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:53   ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 30/33] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 31/33] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 32/33] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2022-01-04 15:53   ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2022-01-04 15:53     ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 33/33] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu
2021-09-23 11:58   ` Yong Wu

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