From: Logan Gunthorpe <logang@deltatee.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-ia64@vger.kernel.org, Linux-sh <linux-sh@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
platform-driver-x86@vger.kernel.org,
Linux MM <linux-mm@kvack.org>, Will Deacon <will@kernel.org>,
Christoph Hellwig <hch@lst.de>,
linux-s390 <linux-s390@vger.kernel.org>,
David Hildenbrand <david@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Ingo Molnar <mingo@redhat.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Michal Hocko <mhocko@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Eric Badger <ebadger@gigaio.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC
Date: Mon, 02 Mar 2020 21:20:07 +0000 [thread overview]
Message-ID: <6e2591ad-4605-aba4-c7b8-2345940e91b4@deltatee.com> (raw)
In-Reply-To: <CAPcyv4gNi3sesGnujShStoF8bi8kYg+MQkqhQRCT_1+wex5wbw@mail.gmail.com>
On 2020-02-29 3:47 p.m., Dan Williams wrote:
> On Fri, Feb 21, 2020 at 10:25 AM Logan Gunthorpe <logang@deltatee.com> wrote:
>>
>> PCI BAR IO memory should never be mapped as WB, however prior to this
>> the PAT bits were set WB and it was typically overridden by MTRR
>> registers set by the firmware.
>>
>> Set PCI P2PDMA memory to be WC (writecombining) as the only current
>> user (the NVMe CMB) was originally mapped WC before the P2PDMA code
>> replaced the mapping with devm_memremap_pages().
>
> Will the change to UC regress this existing use case?
I don't think so. They've been essentially mapped UC for a long time now
(since the P2PDMA patch set was merged) and nobody has complained.
WARNING: multiple messages have this Message-ID (diff)
From: Logan Gunthorpe <logang@deltatee.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
linux-ia64@vger.kernel.org,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
linux-s390 <linux-s390@vger.kernel.org>,
Linux-sh <linux-sh@vger.kernel.org>,
platform-driver-x86@vger.kernel.org,
Linux MM <linux-mm@kvack.org>, Michal Hocko <mhocko@kernel.org>,
David Hildenbrand <david@redhat.com>,
Andrew Morton <akpm@linux-foundation.org>,
Christoph Hellwig <hch@lst.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Eric Badger <ebadger@gigaio.com>, Jason Gunthorpe <jgg@ziepe.ca>
Subject: Re: [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC
Date: Mon, 2 Mar 2020 14:20:07 -0700 [thread overview]
Message-ID: <6e2591ad-4605-aba4-c7b8-2345940e91b4@deltatee.com> (raw)
In-Reply-To: <CAPcyv4gNi3sesGnujShStoF8bi8kYg+MQkqhQRCT_1+wex5wbw@mail.gmail.com>
On 2020-02-29 3:47 p.m., Dan Williams wrote:
> On Fri, Feb 21, 2020 at 10:25 AM Logan Gunthorpe <logang@deltatee.com> wrote:
>>
>> PCI BAR IO memory should never be mapped as WB, however prior to this
>> the PAT bits were set WB and it was typically overridden by MTRR
>> registers set by the firmware.
>>
>> Set PCI P2PDMA memory to be WC (writecombining) as the only current
>> user (the NVMe CMB) was originally mapped WC before the P2PDMA code
>> replaced the mapping with devm_memremap_pages().
>
> Will the change to UC regress this existing use case?
I don't think so. They've been essentially mapped UC for a long time now
(since the P2PDMA patch set was merged) and nobody has complained.
WARNING: multiple messages have this Message-ID (diff)
From: Logan Gunthorpe <logang@deltatee.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-ia64@vger.kernel.org, Linux-sh <linux-sh@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
platform-driver-x86@vger.kernel.org,
Linux MM <linux-mm@kvack.org>, Will Deacon <will@kernel.org>,
Christoph Hellwig <hch@lst.de>,
linux-s390 <linux-s390@vger.kernel.org>,
David Hildenbrand <david@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Ingo Molnar <mingo@redhat.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Michal Hocko <mhocko@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Eric Badger <ebadger@gigaio.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.or>
Subject: Re: [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC
Date: Mon, 2 Mar 2020 14:20:07 -0700 [thread overview]
Message-ID: <6e2591ad-4605-aba4-c7b8-2345940e91b4@deltatee.com> (raw)
In-Reply-To: <CAPcyv4gNi3sesGnujShStoF8bi8kYg+MQkqhQRCT_1+wex5wbw@mail.gmail.com>
On 2020-02-29 3:47 p.m., Dan Williams wrote:
> On Fri, Feb 21, 2020 at 10:25 AM Logan Gunthorpe <logang@deltatee.com> wrote:
>>
>> PCI BAR IO memory should never be mapped as WB, however prior to this
>> the PAT bits were set WB and it was typically overridden by MTRR
>> registers set by the firmware.
>>
>> Set PCI P2PDMA memory to be WC (writecombining) as the only current
>> user (the NVMe CMB) was originally mapped WC before the P2PDMA code
>> replaced the mapping with devm_memremap_pages().
>
> Will the change to UC regress this existing use case?
I don't think so. They've been essentially mapped UC for a long time now
(since the P2PDMA patch set was merged) and nobody has complained.
WARNING: multiple messages have this Message-ID (diff)
From: Logan Gunthorpe <logang@deltatee.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-ia64@vger.kernel.org, Linux-sh <linux-sh@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
platform-driver-x86@vger.kernel.org,
Linux MM <linux-mm@kvack.org>, Will Deacon <will@kernel.org>,
Christoph Hellwig <hch@lst.de>,
linux-s390 <linux-s390@vger.kernel.org>,
David Hildenbrand <david@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Michal Hocko <mhocko@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Eric Badger <ebadger@gigaio.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC
Date: Mon, 2 Mar 2020 14:20:07 -0700 [thread overview]
Message-ID: <6e2591ad-4605-aba4-c7b8-2345940e91b4@deltatee.com> (raw)
In-Reply-To: <CAPcyv4gNi3sesGnujShStoF8bi8kYg+MQkqhQRCT_1+wex5wbw@mail.gmail.com>
On 2020-02-29 3:47 p.m., Dan Williams wrote:
> On Fri, Feb 21, 2020 at 10:25 AM Logan Gunthorpe <logang@deltatee.com> wrote:
>>
>> PCI BAR IO memory should never be mapped as WB, however prior to this
>> the PAT bits were set WB and it was typically overridden by MTRR
>> registers set by the firmware.
>>
>> Set PCI P2PDMA memory to be WC (writecombining) as the only current
>> user (the NVMe CMB) was originally mapped WC before the P2PDMA code
>> replaced the mapping with devm_memremap_pages().
>
> Will the change to UC regress this existing use case?
I don't think so. They've been essentially mapped UC for a long time now
(since the P2PDMA patch set was merged) and nobody has complained.
WARNING: multiple messages have this Message-ID (diff)
From: Logan Gunthorpe <logang@deltatee.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-ia64@vger.kernel.org, Linux-sh <linux-sh@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
platform-driver-x86@vger.kernel.org,
Linux MM <linux-mm@kvack.org>, Will Deacon <will@kernel.org>,
Christoph Hellwig <hch@lst.de>,
linux-s390 <linux-s390@vger.kernel.org>,
David Hildenbrand <david@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Ingo Molnar <mingo@redhat.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Michal Hocko <mhocko@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Eric Badger <ebadger@gigaio.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC
Date: Mon, 2 Mar 2020 14:20:07 -0700 [thread overview]
Message-ID: <6e2591ad-4605-aba4-c7b8-2345940e91b4@deltatee.com> (raw)
In-Reply-To: <CAPcyv4gNi3sesGnujShStoF8bi8kYg+MQkqhQRCT_1+wex5wbw@mail.gmail.com>
On 2020-02-29 3:47 p.m., Dan Williams wrote:
> On Fri, Feb 21, 2020 at 10:25 AM Logan Gunthorpe <logang@deltatee.com> wrote:
>>
>> PCI BAR IO memory should never be mapped as WB, however prior to this
>> the PAT bits were set WB and it was typically overridden by MTRR
>> registers set by the firmware.
>>
>> Set PCI P2PDMA memory to be WC (writecombining) as the only current
>> user (the NVMe CMB) was originally mapped WC before the P2PDMA code
>> replaced the mapping with devm_memremap_pages().
>
> Will the change to UC regress this existing use case?
I don't think so. They've been essentially mapped UC for a long time now
(since the P2PDMA patch set was merged) and nobody has complained.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-03-02 21:20 UTC|newest]
Thread overview: 148+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 18:24 [PATCH v3 0/7] Allow setting caching mode in arch_add_memory() for P2PDMA Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` [PATCH v3 1/7] mm/memory_hotplug: Drop the flags field from struct mhp_restrictions Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-28 21:31 ` Dan Williams
2020-02-28 21:31 ` Dan Williams
2020-02-28 21:31 ` Dan Williams
2020-02-28 21:31 ` Dan Williams
2020-02-28 21:31 ` Dan Williams
2020-02-28 21:31 ` Dan Williams
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-02-21 18:24 ` [PATCH v3 2/7] mm/memory_hotplug: Rename mhp_restrictions to mhp_params Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-24 9:11 ` David Hildenbrand
2020-02-24 9:11 ` David Hildenbrand
2020-02-24 9:11 ` David Hildenbrand
2020-02-24 9:11 ` David Hildenbrand
2020-02-29 20:44 ` Dan Williams
2020-02-29 20:44 ` Dan Williams
2020-02-29 20:44 ` Dan Williams
2020-02-29 20:44 ` Dan Williams
2020-02-29 20:44 ` Dan Williams
2020-02-29 20:44 ` Dan Williams
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-03-03 9:50 ` Michal Hocko
2020-02-21 18:24 ` [PATCH v3 3/7] x86/mm: Thread pgprot_t through init_memory_mapping() Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-21 18:24 ` Logan Gunthorpe
2020-02-29 22:37 ` Dan Williams
2020-02-29 22:37 ` Dan Williams
2020-02-29 22:37 ` Dan Williams
2020-02-29 22:37 ` Dan Williams
2020-02-29 22:37 ` Dan Williams
2020-02-29 22:37 ` Dan Williams
2020-03-03 9:52 ` Michal Hocko
2020-03-03 9:52 ` Michal Hocko
2020-03-03 9:52 ` Michal Hocko
2020-03-03 9:52 ` Michal Hocko
2020-03-03 9:52 ` Michal Hocko
2020-02-21 18:25 ` [PATCH v3 4/7] x86/mm: Introduce _set_memory_prot() Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-29 22:33 ` Dan Williams
2020-02-29 22:33 ` Dan Williams
2020-02-29 22:33 ` Dan Williams
2020-02-29 22:33 ` Dan Williams
2020-02-29 22:33 ` Dan Williams
2020-02-29 22:33 ` Dan Williams
2020-03-02 18:46 ` Logan Gunthorpe
2020-03-02 18:46 ` Logan Gunthorpe
2020-03-02 18:46 ` Logan Gunthorpe
2020-03-02 18:46 ` Logan Gunthorpe
2020-03-02 18:46 ` Logan Gunthorpe
2020-02-21 18:25 ` [PATCH v3 5/7] powerpc/mm: Thread pgprot_t through create_section_mapping() Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` [PATCH v3 6/7] mm/memory_hotplug: Add pgprot_t to mhp_params Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-24 9:26 ` David Hildenbrand
2020-02-24 9:26 ` David Hildenbrand
2020-02-24 9:26 ` David Hildenbrand
2020-02-24 9:26 ` David Hildenbrand
2020-02-29 22:44 ` Dan Williams
2020-02-29 22:44 ` Dan Williams
2020-02-29 22:44 ` Dan Williams
2020-02-29 22:44 ` Dan Williams
2020-02-29 22:44 ` Dan Williams
2020-02-29 22:44 ` Dan Williams
2020-03-02 18:55 ` Logan Gunthorpe
2020-03-02 18:55 ` Logan Gunthorpe
2020-03-02 18:55 ` Logan Gunthorpe
2020-03-02 18:55 ` Logan Gunthorpe
2020-03-02 18:55 ` Logan Gunthorpe
2020-03-02 20:26 ` Dan Williams
2020-03-02 20:26 ` Dan Williams
2020-03-02 20:26 ` Dan Williams
2020-03-02 20:26 ` Dan Williams
2020-03-02 20:26 ` Dan Williams
2020-03-02 20:26 ` Dan Williams
2020-02-21 18:25 ` [PATCH v3 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-21 18:25 ` Logan Gunthorpe
2020-02-29 22:47 ` Dan Williams
2020-02-29 22:47 ` Dan Williams
2020-02-29 22:47 ` Dan Williams
2020-02-29 22:47 ` Dan Williams
2020-02-29 22:47 ` Dan Williams
2020-02-29 22:47 ` Dan Williams
2020-03-02 21:20 ` Logan Gunthorpe [this message]
2020-03-02 21:20 ` Logan Gunthorpe
2020-03-02 21:20 ` Logan Gunthorpe
2020-03-02 21:20 ` Logan Gunthorpe
2020-03-02 21:20 ` Logan Gunthorpe
2020-02-27 17:17 ` [PATCH v3 0/7] Allow setting caching mode in arch_add_memory() for P2PDMA Jason Gunthorpe
2020-02-27 17:17 ` Jason Gunthorpe
2020-02-27 17:17 ` Jason Gunthorpe
2020-02-27 17:17 ` Jason Gunthorpe
2020-02-27 17:17 ` Jason Gunthorpe
2020-02-27 17:21 ` Logan Gunthorpe
2020-02-27 17:21 ` Logan Gunthorpe
2020-02-27 17:21 ` Logan Gunthorpe
2020-02-27 17:21 ` Logan Gunthorpe
2020-02-27 17:21 ` Logan Gunthorpe
2020-02-27 17:43 ` Jason Gunthorpe
2020-02-27 17:43 ` Jason Gunthorpe
2020-02-27 17:43 ` Jason Gunthorpe
2020-02-27 17:43 ` Jason Gunthorpe
2020-02-27 17:43 ` Jason Gunthorpe
2020-02-27 17:54 ` Logan Gunthorpe
2020-02-27 17:54 ` Logan Gunthorpe
2020-02-27 17:54 ` Logan Gunthorpe
2020-02-27 17:54 ` Logan Gunthorpe
2020-02-27 17:54 ` Logan Gunthorpe
2020-02-27 17:55 ` Dan Williams
2020-02-27 17:55 ` Dan Williams
2020-02-27 17:55 ` Dan Williams
2020-02-27 17:55 ` Dan Williams
2020-02-27 17:55 ` Dan Williams
2020-02-27 17:55 ` Dan Williams
2020-02-27 18:03 ` Jason Gunthorpe
2020-02-27 18:03 ` Jason Gunthorpe
2020-02-27 18:03 ` Jason Gunthorpe
2020-02-27 18:03 ` Jason Gunthorpe
2020-02-27 18:03 ` Jason Gunthorpe
2020-02-27 18:08 ` Dan Williams
2020-02-27 18:08 ` Dan Williams
2020-02-27 18:08 ` Dan Williams
2020-02-27 18:08 ` Dan Williams
2020-02-27 18:08 ` Dan Williams
2020-02-27 18:08 ` Dan Williams
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