From: jbrunet@baylibre.com
To: Stephen Boyd <sboyd@kernel.org>, Carlo Caione <carlo@caione.org>,
Kevin Hilman <khilman@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Christian Hewitt <christianshewitt@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL
Date: Tue, 06 Nov 2018 19:49:21 +0100 [thread overview]
Message-ID: <72269086b0ce0be5517c7ffb2bc979c4d17d5cc3.camel@baylibre.com> (raw)
In-Reply-To: <154152980131.88331.14307558394241579493@swboyd.mtv.corp.google.com>
On Tue, 2018-11-06 at 10:43 -0800, Stephen Boyd wrote:
> Quoting Jerome Brunet (2018-11-05 15:08:20)
> > From: Christian Hewitt <christianshewitt@gmail.com>
> >
> > On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems
> > with reboot; e.g. a ~60 second delay between issuing reboot and the
> > board power cycling (and in some OS configurations reboot will fail
> > and require manual power cycling).
> >
> > Similar to 'commit c987ac6f1f088663b6dad39281071aeb31d450a8 ("clk:
> > meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4
> > Co-Processor seems to depend on FCLK_DIV3 being operational.
> >
> > Until commit 05f814402d6174369b3b29832cbb5eb5ed287059 ("clk:
> > meson: add fdiv clock gates"), this clock was modeled and left on by
> > the bootloader.
> >
> > We don't have precise documentation about the SCPI Co-Processor and
> > its clock requirement so we are learning things the hard way.
> >
> > Marking this clock as critical solves the problem but it should not
> > be viewed as final solution. Ideally, the SCPI driver should claim
> > these clocks. We also depends on some clock hand-off mechanism
> > making its way to CCF, to make sure the clock stays on between its
> > registration and the SCPI driver probe.
> >
> > Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
> > Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
> > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > ---
>
> I can toss this into clk-fixes?
>
Sure, it would be great. Thx Stephen.
WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (jbrunet at baylibre.com)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL
Date: Tue, 06 Nov 2018 19:49:21 +0100 [thread overview]
Message-ID: <72269086b0ce0be5517c7ffb2bc979c4d17d5cc3.camel@baylibre.com> (raw)
In-Reply-To: <154152980131.88331.14307558394241579493@swboyd.mtv.corp.google.com>
On Tue, 2018-11-06 at 10:43 -0800, Stephen Boyd wrote:
> Quoting Jerome Brunet (2018-11-05 15:08:20)
> > From: Christian Hewitt <christianshewitt@gmail.com>
> >
> > On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems
> > with reboot; e.g. a ~60 second delay between issuing reboot and the
> > board power cycling (and in some OS configurations reboot will fail
> > and require manual power cycling).
> >
> > Similar to 'commit c987ac6f1f088663b6dad39281071aeb31d450a8 ("clk:
> > meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4
> > Co-Processor seems to depend on FCLK_DIV3 being operational.
> >
> > Until commit 05f814402d6174369b3b29832cbb5eb5ed287059 ("clk:
> > meson: add fdiv clock gates"), this clock was modeled and left on by
> > the bootloader.
> >
> > We don't have precise documentation about the SCPI Co-Processor and
> > its clock requirement so we are learning things the hard way.
> >
> > Marking this clock as critical solves the problem but it should not
> > be viewed as final solution. Ideally, the SCPI driver should claim
> > these clocks. We also depends on some clock hand-off mechanism
> > making its way to CCF, to make sure the clock stays on between its
> > registration and the SCPI driver probe.
> >
> > Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
> > Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
> > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > ---
>
> I can toss this into clk-fixes?
>
Sure, it would be great. Thx Stephen.
next prev parent reply other threads:[~2018-11-06 19:15 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-05 23:08 [PATCH v2] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL Jerome Brunet
2018-11-05 23:08 ` Jerome Brunet
2018-11-06 18:43 ` Stephen Boyd
2018-11-06 18:43 ` Stephen Boyd
2018-11-06 18:49 ` jbrunet [this message]
2018-11-06 18:49 ` jbrunet at baylibre.com
2018-11-08 18:12 ` Stephen Boyd
2018-11-08 18:12 ` Stephen Boyd
2018-11-13 16:38 ` Neil Armstrong
2018-11-13 16:38 ` Neil Armstrong
2018-11-13 16:38 ` Neil Armstrong
2018-11-13 16:41 ` Neil Armstrong
2018-11-13 16:41 ` Neil Armstrong
2018-11-13 16:41 ` Neil Armstrong
2018-11-15 17:33 ` Sasha Levin
2018-11-15 17:33 ` Sasha Levin
2018-11-15 17:33 ` Sasha Levin
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