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From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>
Cc: Stephen Boyd <swboyd@chromium.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Bjorn Andersson <andersson@kernel.org>,
	<linux-arm-msm@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<freedreno@lists.freedesktop.org>
Subject: Re: [PATCH v3 17/27] drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format
Date: Fri, 3 Feb 2023 15:07:26 -0800	[thread overview]
Message-ID: <767e71a1-2041-7b12-ffa6-22568f849e2a@quicinc.com> (raw)
In-Reply-To: <20230203182132.1307834-18-dmitry.baryshkov@linaro.org>



On 2/3/2023 10:21 AM, Dmitry Baryshkov wrote:
> Rewrite dpu_plane's QoS related functions to take struct dpu_sw_pipe and
> struct dpu_format as arguments rather than fetching them from the
> pstate or drm_framebuffer.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Nothing wrong with the change as such but why is this needed?
I looked through tne next patches in the series briefly and unless I am 
missing something, I am not able to see how this rewrite is helping or 
needed for the remaining patches.

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 98 +++++++++++------------
>   1 file changed, 47 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 5aabf9694a53..ee261a591d45 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -128,19 +128,18 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
>   /**
>    * _dpu_plane_calc_bw - calculate bandwidth required for a plane
>    * @plane: Pointer to drm plane.
> - * @fb:   Pointer to framebuffer associated with the given plane
> + * @fmt: Pointer to source buffer format
>    * @pipe_cfg: Pointer to pipe configuration
>    * Result: Updates calculated bandwidth in the plane state.
>    * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
>    * Prefill BW Equation: line src bytes * line_time
>    */
>   static void _dpu_plane_calc_bw(struct drm_plane *plane,
> -	struct drm_framebuffer *fb,
> +	const struct dpu_format *fmt,
>   	struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane_state *pstate;
>   	struct drm_display_mode *mode;
> -	const struct dpu_format *fmt = NULL;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   	int src_width, src_height, dst_height, fps;
>   	u64 plane_prefill_bw;
> @@ -152,8 +151,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
>   	pstate = to_dpu_plane_state(plane->state);
>   	mode = &plane->state->crtc->mode;
>   
> -	fmt = dpu_get_dpu_format_ext(fb->format->format, fb->modifier);
> -
>   	src_width = drm_rect_width(&pipe_cfg->src_rect);
>   	src_height = drm_rect_height(&pipe_cfg->src_rect);
>   	dst_height = drm_rect_height(&pipe_cfg->dst_rect);
> @@ -217,25 +214,25 @@ static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_hw_sspp_cfg
>   /**
>    * _dpu_plane_calc_fill_level - calculate fill level of the given source format
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @fmt:		Pointer to source buffer format
>    * @src_width:		width of source buffer
>    * Return: fill level corresponding to the source buffer/format or 0 if error
>    */
>   static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe,
>   		const struct dpu_format *fmt, u32 src_width)
>   {
>   	struct dpu_plane *pdpu;
> -	struct dpu_plane_state *pstate;
>   	u32 fixed_buff_size;
>   	u32 total_fl;
>   
> -	if (!fmt || !plane->state || !src_width || !fmt->bpp) {
> +	if (!fmt || !pipe || !src_width || !fmt->bpp) {
>   		DPU_ERROR("invalid arguments\n");
>   		return 0;
>   	}
>   
>   	pdpu = to_dpu_plane(plane);
> -	pstate = to_dpu_plane_state(plane->state);
>   	fixed_buff_size = pdpu->catalog->caps->pixel_ram_size;
>   
>   	/* FIXME: in multirect case account for the src_width of all the planes */
> @@ -251,7 +248,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   				((src_width + 32) * fmt->bpp);
>   		}
>   	} else {
> -		if (pstate->pipe.multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
> +		if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
>   			total_fl = (fixed_buff_size / 2) * 2 /
>   				((src_width + 32) * fmt->bpp);
>   		} else {
> @@ -261,7 +258,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   	}
>   
>   	DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %4.4s w:%u fl:%u\n",
> -			pdpu->pipe - SSPP_VIG0,
> +			pipe->sspp->idx - SSPP_VIG0,
>   			(char *)&fmt->base.pixel_format,
>   			src_width, total_fl);
>   
> @@ -271,25 +268,22 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   /**
>    * _dpu_plane_set_qos_lut - set QoS LUT of the given plane
>    * @plane:		Pointer to drm plane
> - * @fb:			Pointer to framebuffer associated with the given plane
> + * @pipe:		Pointer to software pipe
> + * @fmt:		Pointer to source buffer format
>    * @pipe_cfg:		Pointer to pipe configuration
>    */
>   static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
> -		struct drm_framebuffer *fb, struct dpu_hw_sspp_cfg *pipe_cfg)
> +		struct dpu_sw_pipe *pipe,
> +		const struct dpu_format *fmt, struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
> -	const struct dpu_format *fmt = NULL;
>   	u64 qos_lut;
>   	u32 total_fl = 0, lut_usage;
>   
>   	if (!pdpu->is_rt_pipe) {
>   		lut_usage = DPU_QOS_LUT_USAGE_NRT;
>   	} else {
> -		fmt = dpu_get_dpu_format_ext(
> -				fb->format->format,
> -				fb->modifier);
> -		total_fl = _dpu_plane_calc_fill_level(plane, fmt,
> +		total_fl = _dpu_plane_calc_fill_level(plane, pipe, fmt,
>   				drm_rect_width(&pipe_cfg->src_rect));
>   
>   		if (fmt && DPU_FORMAT_IS_LINEAR(fmt))
> @@ -301,7 +295,7 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
>   	qos_lut = _dpu_hw_get_qos_lut(
>   			&pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
>   
> -	trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0,
> +	trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,
>   			(fmt) ? fmt->base.pixel_format : 0,
>   			pdpu->is_rt_pipe, total_fl, qos_lut, lut_usage);
>   
> @@ -310,20 +304,20 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
>   			fmt ? (char *)&fmt->base.pixel_format : NULL,
>   			pdpu->is_rt_pipe, total_fl, qos_lut);
>   
> -	pstate->pipe.sspp->ops.setup_creq_lut(pstate->pipe.sspp, qos_lut);
> +	pipe->sspp->ops.setup_creq_lut(pipe->sspp, qos_lut);
>   }
>   
>   /**
>    * _dpu_plane_set_danger_lut - set danger/safe LUT of the given plane
>    * @plane:		Pointer to drm plane
> - * @fb:			Pointer to framebuffer associated with the given plane
> + * @pipe:		Pointer to software pipe
> + * @fmt:		Pointer to source buffer format
>    */
>   static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
> -		struct drm_framebuffer *fb)
> +		struct dpu_sw_pipe *pipe,
> +		const struct dpu_format *fmt)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
> -	const struct dpu_format *fmt = NULL;
>   	u32 danger_lut, safe_lut;
>   
>   	if (!pdpu->is_rt_pipe) {
> @@ -332,10 +326,6 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
>   		safe_lut = pdpu->catalog->perf->safe_lut_tbl
>   				[DPU_QOS_LUT_USAGE_NRT];
>   	} else {
> -		fmt = dpu_get_dpu_format_ext(
> -				fb->format->format,
> -				fb->modifier);
> -
>   		if (fmt && DPU_FORMAT_IS_LINEAR(fmt)) {
>   			danger_lut = pdpu->catalog->perf->danger_lut_tbl
>   					[DPU_QOS_LUT_USAGE_LINEAR];
> @@ -362,29 +352,30 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
>   		danger_lut,
>   		safe_lut);
>   
> -	pstate->pipe.sspp->ops.setup_danger_safe_lut(pstate->pipe.sspp,
> +	pipe->sspp->ops.setup_danger_safe_lut(pipe->sspp,
>   			danger_lut, safe_lut);
>   }
>   
>   /**
>    * _dpu_plane_set_qos_ctrl - set QoS control of the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @enable:		true to enable QoS control
>    * @flags:		QoS control mode (enum dpu_plane_qos)
>    */
>   static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
> +	struct dpu_sw_pipe *pipe,
>   	bool enable, u32 flags)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_hw_pipe_qos_cfg pipe_qos_cfg;
>   
>   	memset(&pipe_qos_cfg, 0, sizeof(pipe_qos_cfg));
>   
>   	if (flags & DPU_PLANE_QOS_VBLANK_CTRL) {
> -		pipe_qos_cfg.creq_vblank = pstate->pipe.sspp->cap->sblk->creq_vblank;
> +		pipe_qos_cfg.creq_vblank = pipe->sspp->cap->sblk->creq_vblank;
>   		pipe_qos_cfg.danger_vblank =
> -				pstate->pipe.sspp->cap->sblk->danger_vblank;
> +				pipe->sspp->cap->sblk->danger_vblank;
>   		pipe_qos_cfg.vblank_en = enable;
>   	}
>   
> @@ -410,33 +401,34 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
>   		pipe_qos_cfg.danger_vblank,
>   		pdpu->is_rt_pipe);
>   
> -	pstate->pipe.sspp->ops.setup_qos_ctrl(pstate->pipe.sspp,
> +	pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,
>   			&pipe_qos_cfg);
>   }
>   
>   /**
>    * _dpu_plane_set_ot_limit - set OT limit for the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @crtc:		Pointer to drm crtc
>    * @pipe_cfg:		Pointer to pipe configuration
>    */
>   static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe,
>   		struct drm_crtc *crtc, struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_vbif_set_ot_params ot_params;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	memset(&ot_params, 0, sizeof(ot_params));
> -	ot_params.xin_id = pstate->pipe.sspp->cap->xin_id;
> -	ot_params.num = pstate->pipe.sspp->idx - SSPP_NONE;
> +	ot_params.xin_id = pipe->sspp->cap->xin_id;
> +	ot_params.num = pipe->sspp->idx - SSPP_NONE;
>   	ot_params.width = drm_rect_width(&pipe_cfg->src_rect);
>   	ot_params.height = drm_rect_height(&pipe_cfg->src_rect);
>   	ot_params.is_wfd = !pdpu->is_rt_pipe;
>   	ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode);
>   	ot_params.vbif_idx = VBIF_RT;
> -	ot_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
> +	ot_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
>   	ot_params.rd = true;
>   
>   	dpu_vbif_set_ot_limit(dpu_kms, &ot_params);
> @@ -445,19 +437,20 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
>   /**
>    * _dpu_plane_set_qos_remap - set vbif QoS for the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    */
> -static void _dpu_plane_set_qos_remap(struct drm_plane *plane)
> +static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_vbif_set_qos_params qos_params;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	memset(&qos_params, 0, sizeof(qos_params));
>   	qos_params.vbif_idx = VBIF_RT;
> -	qos_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
> -	qos_params.xin_id = pstate->pipe.sspp->cap->xin_id;
> -	qos_params.num = pstate->pipe.sspp->idx - SSPP_VIG0;
> +	qos_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
> +	qos_params.xin_id = pipe->sspp->cap->xin_id;
> +	qos_params.num = pipe->sspp->idx - SSPP_VIG0;
>   	qos_params.is_rt = pdpu->is_rt_pipe;
>   
>   	DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
> @@ -1144,7 +1137,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>   	pstate->needs_qos_remap |= (is_rt_pipe != pdpu->is_rt_pipe);
>   	pdpu->is_rt_pipe = is_rt_pipe;
>   
> -	_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
> +	_dpu_plane_set_qos_ctrl(plane, pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
>   
>   	DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT
>   			", %4.4s ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src),
> @@ -1213,20 +1206,20 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>   		}
>   	}
>   
> -	_dpu_plane_set_qos_lut(plane, fb, &pipe_cfg);
> -	_dpu_plane_set_danger_lut(plane, fb);
> +	_dpu_plane_set_qos_lut(plane, pipe, fmt, &pipe_cfg);
> +	_dpu_plane_set_danger_lut(plane, pipe, fmt);
>   
>   	if (plane->type != DRM_PLANE_TYPE_CURSOR) {
> -		_dpu_plane_set_qos_ctrl(plane, true, DPU_PLANE_QOS_PANIC_CTRL);
> -		_dpu_plane_set_ot_limit(plane, crtc, &pipe_cfg);
> +		_dpu_plane_set_qos_ctrl(plane, pipe, true, DPU_PLANE_QOS_PANIC_CTRL);
> +		_dpu_plane_set_ot_limit(plane, pipe, crtc, &pipe_cfg);
>   	}
>   
>   	if (pstate->needs_qos_remap) {
>   		pstate->needs_qos_remap = false;
> -		_dpu_plane_set_qos_remap(plane);
> +		_dpu_plane_set_qos_remap(plane, pipe);
>   	}
>   
> -	_dpu_plane_calc_bw(plane, fb, &pipe_cfg);
> +	_dpu_plane_calc_bw(plane, fmt, &pipe_cfg);
>   
>   	_dpu_plane_calc_clk(plane, &pipe_cfg);
>   }
> @@ -1263,11 +1256,13 @@ static void dpu_plane_atomic_update(struct drm_plane *plane,
>   static void dpu_plane_destroy(struct drm_plane *plane)
>   {
>   	struct dpu_plane *pdpu = plane ? to_dpu_plane(plane) : NULL;
> +	struct dpu_plane_state *pstate;
>   
>   	DPU_DEBUG_PLANE(pdpu, "\n");
>   
>   	if (pdpu) {
> -		_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
> +		pstate = to_dpu_plane_state(plane->state);
> +		_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
>   
>   		mutex_destroy(&pdpu->lock);
>   
> @@ -1395,13 +1390,14 @@ static void dpu_plane_reset(struct drm_plane *plane)
>   void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> +	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	if (!pdpu->is_rt_pipe)
>   		return;
>   
>   	pm_runtime_get_sync(&dpu_kms->pdev->dev);
> -	_dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL);
> +	_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, enable, DPU_PLANE_QOS_PANIC_CTRL);
>   	pm_runtime_put_sync(&dpu_kms->pdev->dev);
>   }
>   #endif

WARNING: multiple messages have this Message-ID (diff)
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>
Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	Bjorn Andersson <andersson@kernel.org>,
	dri-devel@lists.freedesktop.org,
	Stephen Boyd <swboyd@chromium.org>
Subject: Re: [PATCH v3 17/27] drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format
Date: Fri, 3 Feb 2023 15:07:26 -0800	[thread overview]
Message-ID: <767e71a1-2041-7b12-ffa6-22568f849e2a@quicinc.com> (raw)
In-Reply-To: <20230203182132.1307834-18-dmitry.baryshkov@linaro.org>



On 2/3/2023 10:21 AM, Dmitry Baryshkov wrote:
> Rewrite dpu_plane's QoS related functions to take struct dpu_sw_pipe and
> struct dpu_format as arguments rather than fetching them from the
> pstate or drm_framebuffer.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Nothing wrong with the change as such but why is this needed?
I looked through tne next patches in the series briefly and unless I am 
missing something, I am not able to see how this rewrite is helping or 
needed for the remaining patches.

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 98 +++++++++++------------
>   1 file changed, 47 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 5aabf9694a53..ee261a591d45 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -128,19 +128,18 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
>   /**
>    * _dpu_plane_calc_bw - calculate bandwidth required for a plane
>    * @plane: Pointer to drm plane.
> - * @fb:   Pointer to framebuffer associated with the given plane
> + * @fmt: Pointer to source buffer format
>    * @pipe_cfg: Pointer to pipe configuration
>    * Result: Updates calculated bandwidth in the plane state.
>    * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
>    * Prefill BW Equation: line src bytes * line_time
>    */
>   static void _dpu_plane_calc_bw(struct drm_plane *plane,
> -	struct drm_framebuffer *fb,
> +	const struct dpu_format *fmt,
>   	struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane_state *pstate;
>   	struct drm_display_mode *mode;
> -	const struct dpu_format *fmt = NULL;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   	int src_width, src_height, dst_height, fps;
>   	u64 plane_prefill_bw;
> @@ -152,8 +151,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
>   	pstate = to_dpu_plane_state(plane->state);
>   	mode = &plane->state->crtc->mode;
>   
> -	fmt = dpu_get_dpu_format_ext(fb->format->format, fb->modifier);
> -
>   	src_width = drm_rect_width(&pipe_cfg->src_rect);
>   	src_height = drm_rect_height(&pipe_cfg->src_rect);
>   	dst_height = drm_rect_height(&pipe_cfg->dst_rect);
> @@ -217,25 +214,25 @@ static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_hw_sspp_cfg
>   /**
>    * _dpu_plane_calc_fill_level - calculate fill level of the given source format
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @fmt:		Pointer to source buffer format
>    * @src_width:		width of source buffer
>    * Return: fill level corresponding to the source buffer/format or 0 if error
>    */
>   static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe,
>   		const struct dpu_format *fmt, u32 src_width)
>   {
>   	struct dpu_plane *pdpu;
> -	struct dpu_plane_state *pstate;
>   	u32 fixed_buff_size;
>   	u32 total_fl;
>   
> -	if (!fmt || !plane->state || !src_width || !fmt->bpp) {
> +	if (!fmt || !pipe || !src_width || !fmt->bpp) {
>   		DPU_ERROR("invalid arguments\n");
>   		return 0;
>   	}
>   
>   	pdpu = to_dpu_plane(plane);
> -	pstate = to_dpu_plane_state(plane->state);
>   	fixed_buff_size = pdpu->catalog->caps->pixel_ram_size;
>   
>   	/* FIXME: in multirect case account for the src_width of all the planes */
> @@ -251,7 +248,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   				((src_width + 32) * fmt->bpp);
>   		}
>   	} else {
> -		if (pstate->pipe.multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
> +		if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
>   			total_fl = (fixed_buff_size / 2) * 2 /
>   				((src_width + 32) * fmt->bpp);
>   		} else {
> @@ -261,7 +258,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   	}
>   
>   	DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %4.4s w:%u fl:%u\n",
> -			pdpu->pipe - SSPP_VIG0,
> +			pipe->sspp->idx - SSPP_VIG0,
>   			(char *)&fmt->base.pixel_format,
>   			src_width, total_fl);
>   
> @@ -271,25 +268,22 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
>   /**
>    * _dpu_plane_set_qos_lut - set QoS LUT of the given plane
>    * @plane:		Pointer to drm plane
> - * @fb:			Pointer to framebuffer associated with the given plane
> + * @pipe:		Pointer to software pipe
> + * @fmt:		Pointer to source buffer format
>    * @pipe_cfg:		Pointer to pipe configuration
>    */
>   static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
> -		struct drm_framebuffer *fb, struct dpu_hw_sspp_cfg *pipe_cfg)
> +		struct dpu_sw_pipe *pipe,
> +		const struct dpu_format *fmt, struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
> -	const struct dpu_format *fmt = NULL;
>   	u64 qos_lut;
>   	u32 total_fl = 0, lut_usage;
>   
>   	if (!pdpu->is_rt_pipe) {
>   		lut_usage = DPU_QOS_LUT_USAGE_NRT;
>   	} else {
> -		fmt = dpu_get_dpu_format_ext(
> -				fb->format->format,
> -				fb->modifier);
> -		total_fl = _dpu_plane_calc_fill_level(plane, fmt,
> +		total_fl = _dpu_plane_calc_fill_level(plane, pipe, fmt,
>   				drm_rect_width(&pipe_cfg->src_rect));
>   
>   		if (fmt && DPU_FORMAT_IS_LINEAR(fmt))
> @@ -301,7 +295,7 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
>   	qos_lut = _dpu_hw_get_qos_lut(
>   			&pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
>   
> -	trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0,
> +	trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,
>   			(fmt) ? fmt->base.pixel_format : 0,
>   			pdpu->is_rt_pipe, total_fl, qos_lut, lut_usage);
>   
> @@ -310,20 +304,20 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
>   			fmt ? (char *)&fmt->base.pixel_format : NULL,
>   			pdpu->is_rt_pipe, total_fl, qos_lut);
>   
> -	pstate->pipe.sspp->ops.setup_creq_lut(pstate->pipe.sspp, qos_lut);
> +	pipe->sspp->ops.setup_creq_lut(pipe->sspp, qos_lut);
>   }
>   
>   /**
>    * _dpu_plane_set_danger_lut - set danger/safe LUT of the given plane
>    * @plane:		Pointer to drm plane
> - * @fb:			Pointer to framebuffer associated with the given plane
> + * @pipe:		Pointer to software pipe
> + * @fmt:		Pointer to source buffer format
>    */
>   static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
> -		struct drm_framebuffer *fb)
> +		struct dpu_sw_pipe *pipe,
> +		const struct dpu_format *fmt)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
> -	const struct dpu_format *fmt = NULL;
>   	u32 danger_lut, safe_lut;
>   
>   	if (!pdpu->is_rt_pipe) {
> @@ -332,10 +326,6 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
>   		safe_lut = pdpu->catalog->perf->safe_lut_tbl
>   				[DPU_QOS_LUT_USAGE_NRT];
>   	} else {
> -		fmt = dpu_get_dpu_format_ext(
> -				fb->format->format,
> -				fb->modifier);
> -
>   		if (fmt && DPU_FORMAT_IS_LINEAR(fmt)) {
>   			danger_lut = pdpu->catalog->perf->danger_lut_tbl
>   					[DPU_QOS_LUT_USAGE_LINEAR];
> @@ -362,29 +352,30 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
>   		danger_lut,
>   		safe_lut);
>   
> -	pstate->pipe.sspp->ops.setup_danger_safe_lut(pstate->pipe.sspp,
> +	pipe->sspp->ops.setup_danger_safe_lut(pipe->sspp,
>   			danger_lut, safe_lut);
>   }
>   
>   /**
>    * _dpu_plane_set_qos_ctrl - set QoS control of the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @enable:		true to enable QoS control
>    * @flags:		QoS control mode (enum dpu_plane_qos)
>    */
>   static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
> +	struct dpu_sw_pipe *pipe,
>   	bool enable, u32 flags)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_hw_pipe_qos_cfg pipe_qos_cfg;
>   
>   	memset(&pipe_qos_cfg, 0, sizeof(pipe_qos_cfg));
>   
>   	if (flags & DPU_PLANE_QOS_VBLANK_CTRL) {
> -		pipe_qos_cfg.creq_vblank = pstate->pipe.sspp->cap->sblk->creq_vblank;
> +		pipe_qos_cfg.creq_vblank = pipe->sspp->cap->sblk->creq_vblank;
>   		pipe_qos_cfg.danger_vblank =
> -				pstate->pipe.sspp->cap->sblk->danger_vblank;
> +				pipe->sspp->cap->sblk->danger_vblank;
>   		pipe_qos_cfg.vblank_en = enable;
>   	}
>   
> @@ -410,33 +401,34 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
>   		pipe_qos_cfg.danger_vblank,
>   		pdpu->is_rt_pipe);
>   
> -	pstate->pipe.sspp->ops.setup_qos_ctrl(pstate->pipe.sspp,
> +	pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,
>   			&pipe_qos_cfg);
>   }
>   
>   /**
>    * _dpu_plane_set_ot_limit - set OT limit for the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    * @crtc:		Pointer to drm crtc
>    * @pipe_cfg:		Pointer to pipe configuration
>    */
>   static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe,
>   		struct drm_crtc *crtc, struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_vbif_set_ot_params ot_params;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	memset(&ot_params, 0, sizeof(ot_params));
> -	ot_params.xin_id = pstate->pipe.sspp->cap->xin_id;
> -	ot_params.num = pstate->pipe.sspp->idx - SSPP_NONE;
> +	ot_params.xin_id = pipe->sspp->cap->xin_id;
> +	ot_params.num = pipe->sspp->idx - SSPP_NONE;
>   	ot_params.width = drm_rect_width(&pipe_cfg->src_rect);
>   	ot_params.height = drm_rect_height(&pipe_cfg->src_rect);
>   	ot_params.is_wfd = !pdpu->is_rt_pipe;
>   	ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode);
>   	ot_params.vbif_idx = VBIF_RT;
> -	ot_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
> +	ot_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
>   	ot_params.rd = true;
>   
>   	dpu_vbif_set_ot_limit(dpu_kms, &ot_params);
> @@ -445,19 +437,20 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
>   /**
>    * _dpu_plane_set_qos_remap - set vbif QoS for the given plane
>    * @plane:		Pointer to drm plane
> + * @pipe:		Pointer to software pipe
>    */
> -static void _dpu_plane_set_qos_remap(struct drm_plane *plane)
> +static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
> +		struct dpu_sw_pipe *pipe)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> -	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_vbif_set_qos_params qos_params;
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	memset(&qos_params, 0, sizeof(qos_params));
>   	qos_params.vbif_idx = VBIF_RT;
> -	qos_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
> -	qos_params.xin_id = pstate->pipe.sspp->cap->xin_id;
> -	qos_params.num = pstate->pipe.sspp->idx - SSPP_VIG0;
> +	qos_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
> +	qos_params.xin_id = pipe->sspp->cap->xin_id;
> +	qos_params.num = pipe->sspp->idx - SSPP_VIG0;
>   	qos_params.is_rt = pdpu->is_rt_pipe;
>   
>   	DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
> @@ -1144,7 +1137,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>   	pstate->needs_qos_remap |= (is_rt_pipe != pdpu->is_rt_pipe);
>   	pdpu->is_rt_pipe = is_rt_pipe;
>   
> -	_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
> +	_dpu_plane_set_qos_ctrl(plane, pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
>   
>   	DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT
>   			", %4.4s ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src),
> @@ -1213,20 +1206,20 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>   		}
>   	}
>   
> -	_dpu_plane_set_qos_lut(plane, fb, &pipe_cfg);
> -	_dpu_plane_set_danger_lut(plane, fb);
> +	_dpu_plane_set_qos_lut(plane, pipe, fmt, &pipe_cfg);
> +	_dpu_plane_set_danger_lut(plane, pipe, fmt);
>   
>   	if (plane->type != DRM_PLANE_TYPE_CURSOR) {
> -		_dpu_plane_set_qos_ctrl(plane, true, DPU_PLANE_QOS_PANIC_CTRL);
> -		_dpu_plane_set_ot_limit(plane, crtc, &pipe_cfg);
> +		_dpu_plane_set_qos_ctrl(plane, pipe, true, DPU_PLANE_QOS_PANIC_CTRL);
> +		_dpu_plane_set_ot_limit(plane, pipe, crtc, &pipe_cfg);
>   	}
>   
>   	if (pstate->needs_qos_remap) {
>   		pstate->needs_qos_remap = false;
> -		_dpu_plane_set_qos_remap(plane);
> +		_dpu_plane_set_qos_remap(plane, pipe);
>   	}
>   
> -	_dpu_plane_calc_bw(plane, fb, &pipe_cfg);
> +	_dpu_plane_calc_bw(plane, fmt, &pipe_cfg);
>   
>   	_dpu_plane_calc_clk(plane, &pipe_cfg);
>   }
> @@ -1263,11 +1256,13 @@ static void dpu_plane_atomic_update(struct drm_plane *plane,
>   static void dpu_plane_destroy(struct drm_plane *plane)
>   {
>   	struct dpu_plane *pdpu = plane ? to_dpu_plane(plane) : NULL;
> +	struct dpu_plane_state *pstate;
>   
>   	DPU_DEBUG_PLANE(pdpu, "\n");
>   
>   	if (pdpu) {
> -		_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
> +		pstate = to_dpu_plane_state(plane->state);
> +		_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
>   
>   		mutex_destroy(&pdpu->lock);
>   
> @@ -1395,13 +1390,14 @@ static void dpu_plane_reset(struct drm_plane *plane)
>   void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
>   {
>   	struct dpu_plane *pdpu = to_dpu_plane(plane);
> +	struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
>   	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   
>   	if (!pdpu->is_rt_pipe)
>   		return;
>   
>   	pm_runtime_get_sync(&dpu_kms->pdev->dev);
> -	_dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL);
> +	_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, enable, DPU_PLANE_QOS_PANIC_CTRL);
>   	pm_runtime_put_sync(&dpu_kms->pdev->dev);
>   }
>   #endif

  reply	other threads:[~2023-02-03 23:07 UTC|newest]

Thread overview: 176+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-03 18:21 [PATCH v3 00/27] drm/msm/dpu: wide planes support Dmitry Baryshkov
2023-02-03 18:21 ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 01/27] drm/msm/dpu: rename struct dpu_hw_pipe(_cfg) to dpu_hw_sspp(_cfg) Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 19:31   ` Abhinav Kumar
2023-02-03 19:31     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 02/27] drm/msm/dpu: move SSPP allocation to the RM Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 03/27] drm/msm/dpu: move SSPP debugfs creation to dpu_kms.c Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 04/27] drm/msm/dpu: drop EAGAIN check from dpu_format_populate_layout Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 05/27] drm/msm/dpu: move pipe_hw to dpu_plane_state Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 19:34   ` Abhinav Kumar
2023-02-03 19:34     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 06/27] drm/msm/dpu: drop dpu_plane_pipe function Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 07/27] drm/msm/dpu: introduce struct dpu_sw_pipe Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 08/27] drm/msm/dpu: use dpu_sw_pipe for dpu_hw_sspp callbacks Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 09/27] drm/msm/dpu: pass dpu_format to _dpu_hw_sspp_setup_scaler3() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 19:36   ` Abhinav Kumar
2023-02-03 19:36     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 10/27] drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fill Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 20:36   ` Abhinav Kumar
2023-02-03 20:36     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 11/27] drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddress Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 20:37   ` Abhinav Kumar
2023-02-03 20:37     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 12/27] drm/msm/dpu: remove dpu_hw_fmt_layout from struct dpu_hw_sspp_cfg Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 13/27] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 14/27] drm/msm/dpu: don't use unsupported blend stages Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 20:42   ` Abhinav Kumar
2023-02-03 20:42     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 15/27] drm/msm/dpu: move the rest of plane checks to dpu_plane_atomic_check() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 22:44   ` Abhinav Kumar
2023-02-03 22:44     ` Abhinav Kumar
2023-02-03 22:55     ` Dmitry Baryshkov
2023-02-03 22:55       ` Dmitry Baryshkov
2023-02-14 23:25       ` Abhinav Kumar
2023-02-14 23:25         ` Abhinav Kumar
2023-02-15  0:08         ` Dmitry Baryshkov
2023-02-15  0:08           ` Dmitry Baryshkov
2023-03-03 11:43           ` Dmitry Baryshkov
2023-03-03 11:43             ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 16/27] drm/msm/dpu: drop redundant plane dst check from dpu_crtc_atomic_check() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 22:57   ` Abhinav Kumar
2023-02-03 22:57     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 17/27] drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 23:07   ` Abhinav Kumar [this message]
2023-02-03 23:07     ` Abhinav Kumar
2023-02-03 23:20     ` Dmitry Baryshkov
2023-02-03 23:20       ` Dmitry Baryshkov
2023-02-08 23:09       ` Abhinav Kumar
2023-02-08 23:09         ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 18/27] drm/msm/dpu: populate SmartDMA features in hw catalog Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-03 23:35   ` Abhinav Kumar
2023-02-03 23:35     ` Abhinav Kumar
2023-02-04  2:29     ` Dmitry Baryshkov
2023-02-04  2:29       ` Dmitry Baryshkov
2023-02-04  2:43       ` Abhinav Kumar
2023-02-04  2:43         ` Abhinav Kumar
2023-02-04  4:10         ` Dmitry Baryshkov
2023-02-04  4:10           ` Dmitry Baryshkov
2023-02-04  5:10           ` Abhinav Kumar
2023-02-04  5:10             ` Abhinav Kumar
2023-02-04 10:43             ` Dmitry Baryshkov
2023-02-04 10:43               ` Dmitry Baryshkov
2023-02-04 18:35               ` Abhinav Kumar
2023-02-04 18:35                 ` Abhinav Kumar
2023-02-04 21:08                 ` Dmitry Baryshkov
2023-02-04 21:08                   ` Dmitry Baryshkov
2023-02-04 23:20                   ` Abhinav Kumar
2023-02-04 23:20                     ` Abhinav Kumar
2023-02-05  0:29                     ` Dmitry Baryshkov
2023-02-05  0:29                       ` Dmitry Baryshkov
2023-02-05  0:36                       ` Abhinav Kumar
2023-02-05  0:36                         ` Abhinav Kumar
2023-02-08 23:53                         ` Dmitry Baryshkov
2023-02-08 23:53                           ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 19/27] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-06 18:48   ` Abhinav Kumar
2023-02-06 18:48     ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 20/27] drm/msm/dpu: add dpu_hw_pipe_cfg to dpu_plane_state Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-06 19:07   ` Abhinav Kumar
2023-02-06 19:07     ` Abhinav Kumar
2023-02-16 16:49     ` Dmitry Baryshkov
2023-02-16 16:49       ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 21/27] drm/msm/dpu: simplify dpu_plane_validate_src() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-06 22:40   ` Abhinav Kumar
2023-02-06 22:40     ` Abhinav Kumar
2023-02-07  0:27     ` Dmitry Baryshkov
2023-02-07  0:27       ` Dmitry Baryshkov
2023-02-07  0:42       ` Abhinav Kumar
2023-02-07  0:42         ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 22/27] drm/msm/dpu: rework dpu_plane_sspp_atomic_update() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-07  0:22   ` Abhinav Kumar
2023-02-07  0:22     ` Abhinav Kumar
2023-02-09  0:49     ` Dmitry Baryshkov
2023-02-09  0:49       ` Dmitry Baryshkov
2023-02-09  0:51     ` Dmitry Baryshkov
2023-02-09  0:51       ` Dmitry Baryshkov
2023-02-09 11:46     ` Dmitry Baryshkov
2023-02-09 11:46       ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 23/27] drm/msm/dpu: rework dpu_plane_atomic_check() Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-07 17:49   ` Abhinav Kumar
2023-02-07 17:49     ` Abhinav Kumar
2023-02-07 17:51     ` Dmitry Baryshkov
2023-02-07 17:51       ` Dmitry Baryshkov
2023-02-07 17:57       ` Abhinav Kumar
2023-02-07 17:57         ` Abhinav Kumar
2023-02-07 17:59         ` Dmitry Baryshkov
2023-02-07 17:59           ` Dmitry Baryshkov
2023-02-07 18:08           ` Abhinav Kumar
2023-02-07 18:08             ` Abhinav Kumar
2023-02-07 19:51             ` Dmitry Baryshkov
2023-02-07 19:51               ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 24/27] drm/msm/dpu: rework plane CSC setting Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-07 20:05   ` Abhinav Kumar
2023-02-07 20:05     ` Abhinav Kumar
2023-02-07 20:44     ` Dmitry Baryshkov
2023-02-07 20:44       ` Dmitry Baryshkov
2023-02-07 20:57       ` Abhinav Kumar
2023-02-07 20:57         ` Abhinav Kumar
2023-02-03 18:21 ` [PATCH v3 25/27] drm/msm/dpu: rework static color fill code Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-08 22:34   ` Abhinav Kumar
2023-02-08 22:34     ` Abhinav Kumar
2023-02-09  0:53     ` Dmitry Baryshkov
2023-02-09  0:53       ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 26/27] drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixer Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-08 23:44   ` Abhinav Kumar
2023-02-08 23:44     ` Abhinav Kumar
2023-02-08 23:47     ` Dmitry Baryshkov
2023-02-08 23:47       ` Dmitry Baryshkov
2023-03-03 12:18     ` Dmitry Baryshkov
2023-03-03 12:18       ` Dmitry Baryshkov
2023-02-03 18:21 ` [PATCH v3 27/27] drm/msm/dpu: add support for wide planes Dmitry Baryshkov
2023-02-03 18:21   ` Dmitry Baryshkov
2023-02-09  2:19   ` Abhinav Kumar
2023-02-09  2:19     ` Abhinav Kumar
2023-02-09 11:45     ` Dmitry Baryshkov
2023-02-09 11:45       ` Dmitry Baryshkov
2023-02-09 19:25       ` Abhinav Kumar
2023-02-09 19:25         ` Abhinav Kumar
2023-02-09 21:23         ` Dmitry Baryshkov
2023-02-09 21:23           ` Dmitry Baryshkov
2023-02-09 22:12           ` [Freedreno] " Abhinav Kumar
2023-02-09 22:12             ` Abhinav Kumar
2023-02-10  0:09             ` Dmitry Baryshkov
2023-02-10  0:09               ` Dmitry Baryshkov
2023-02-10  1:12               ` Abhinav Kumar
2023-02-10  1:12                 ` Abhinav Kumar
2023-02-10  2:46                 ` Dmitry Baryshkov
2023-02-10  2:46                   ` Dmitry Baryshkov
2023-02-03 18:24 ` [PATCH v3 00/27] drm/msm/dpu: wide planes support Dmitry Baryshkov
2023-02-03 18:24   ` Dmitry Baryshkov

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