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From: "Amadeusz Sławiński" <amadeuszx.slawinski@linux.intel.com>
To: Cezary Rojewski <cezary.rojewski@intel.com>,
	Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, upstream@semihalf.com,
	harshapriya.n@intel.com, peter.ujfalusi@linux.intel.com,
	rad@semihalf.com, pierre-louis.bossart@linux.intel.com,
	tiwai@suse.com, hdegoede@redhat.com,
	ranjani.sridharan@linux.intel.com, cujomalainey@chromium.org,
	yung-chuan.liao@linux.intel.com, lma@semihalf.com
Subject: Re: [RFC 00/37] ASoC: Intel: AVS - Audio DSP for cAVS
Date: Wed, 2 Feb 2022 14:26:01 +0100	[thread overview]
Message-ID: <7695fc34-143d-7715-85cb-7790386bbacc@linux.intel.com> (raw)
In-Reply-To: <ccb2f9f0-e9fa-3215-f623-bac58b4c9633@intel.com>

On 1/30/2022 8:15 PM, Cezary Rojewski wrote:
> 
> path-API found in path.h is limited and maps nicely to DAI operations:
> 
> avs_path_create()
> avs_path_bind(struct avs_path *path)
>      used during DAI's ->hw_params()
> 
> avs_path_free(struct avs_path *path)
> avs_path_unbind(struct avs_path *path)
>      used during DAI's ->hw_free()
> 
> avs_path_reset(struct avs_path *path)
> avs_path_pause(struct avs_path *path)
> avs_path_run(struct avs_path *path, int trigger)
>      state setters, used during DAI's ->prepare() and ->trigger()
> 
> given this picture, one could say that there are framework elements that 
> allow driver writer to implement whatever is needed for DSP-capable driver.

Although Cezary wrote that avs_path_reset/_pause/_run maps nicely to 
trigger operation it's not direct mapping. AVS FW has requirements on 
order of operations on pipelines (which are grouped in paths on kernel 
side). For example on TRIGGER_STOP we need to first pause all pipelines 
before issuing reset to any of them. This is required by FW, so that if 
there are two pipelines it doesn't pause and reset one of them, while 
the other one is still in running state, as this causes xruns on FW side.

Relevant fragment from "[RFC 27/37] ASoC: Intel: avs: non-HDA PCM BE 
operations"
+	case SNDRV_PCM_TRIGGER_STOP:
+		ret = avs_path_pause(data->path);
+		if (ret < 0)
+			dev_err(dai->dev, "pause BE path failed: %d\n", ret);
+
+		if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+			ret = avs_path_reset(data->path);
+			if (ret < 0)
+				dev_err(dai->dev, "reset FE path failed: %d\n", ret);
+		}
+		break;
+

I would say that such behavior doesn't translate nicely to generic API.


I tried looking once again at how one would split the path concept to 
make it more generic, but it is hard. On one hand paths are tied to AVS 
driver topology design, on the other hand we have (mentioned above) FW 
requirements.

To describe it in more detail, in AVS we need topology as it describes 
bindings between paths. Simple topologies have route map similar to this 
one:

SectionGraph."ssp0_Tx_spt-audio-playback" {
     index "0"

     lines [
         "ssp0 Tx, , ssp0p_be"
         "ssp0p_be, , ssp0p_fe"
         "ssp0p_fe, , spt-audio-playback"
     ]
}

where ssp0p_be and ssp0p_fe are widgets describing BE and FE configuration.

Taking for example FE widget we have:

SectionWidget."ssp0p_fe" {
     index "0"
     type "scheduler"
     no_pm "true"
     ignore_suspend "false"

     data [
         "path_tmpl2_data"
     ]
}

where we can see that apart from its own configuration it has additional 
data describing path inside it:

SectionData."path_tmpl2_data" {
     tuples [
         "path_tmpl2_tuples"
         "path_tmpl2_path0_tuples"
         "path_tmpl2_path0_ppl0_tuples"
         "path_tmpl2_path0_ppl0_mod0_tuples"
         "path_tmpl2_path0_ppl0_bindid0_tuples"
     ]
}

now for the concept of paths the most interesting field is 
"path_tmpl2_path0_ppl0_bindid0_tuples" as it describes to which path we 
want to bind. It is done this way as FW modules internally have pins, 
and while in most cases one wants to just bind on pin 0, sometimes there 
is a need to describe more complicated connections. And so we circled 
back to FW requirements.


Overall I would say that path design in AVS is tied too much to FW 
requirements to be made generic. And even if some general API was 
provided we would still need most of current code on AVS path to handle 
the requirements, while we would have additional constrains coming from 
API above.


> And now back to the _full picture_ that I'm clearly not seeing yet. How 
> do you envision interfaces that should be added to the ASoC framework? 
> Are we talking about soc-path.c level of a change? It would be helpful 
> to have even a single operation (from the list above) drawn as an 
> example of what is expected.


Similarly to the above I'm open to suggestions on how such API may look 
like.

Best Regards,
Amadeusz

  reply	other threads:[~2022-02-02 13:27 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-08 11:12 [RFC 00/37] ASoC: Intel: AVS - Audio DSP for cAVS Cezary Rojewski
2021-12-08 11:12 ` [RFC 01/37] ALSA: hda: Add snd_hdac_ext_bus_link_at() helper Cezary Rojewski
2021-12-08 11:12 ` [RFC 02/37] ALSA: hda: Update and expose snd_hda_codec_device_init() Cezary Rojewski
2021-12-08 11:12 ` [RFC 03/37] ALSA: hda: Update and expose codec register procedures Cezary Rojewski
2021-12-08 11:12 ` [RFC 04/37] ALSA: hda: Expose codec cleanup and power-save functions Cezary Rojewski
2021-12-08 11:12 ` [RFC 05/37] ALSA: hda: Add helper macros for DSP capable devices Cezary Rojewski
2021-12-08 11:12 ` [RFC 06/37] ASoC: Export DAI register and widget ctor and dctor functions Cezary Rojewski
2021-12-21 13:41   ` Mark Brown
2021-12-21 16:40     ` Cezary Rojewski
2021-12-08 11:12 ` [RFC 07/37] ASoC: Intel: Introduce AVS driver Cezary Rojewski
2021-12-08 11:12 ` [RFC 08/37] ASoC: Intel: avs: Inter process communication Cezary Rojewski
2021-12-08 11:12 ` [RFC 09/37] ASoC: Intel: avs: Add code loading requests Cezary Rojewski
2021-12-08 11:12 ` [RFC 10/37] ASoC: Intel: avs: Add pipeline management requests Cezary Rojewski
2021-12-08 11:12 ` [RFC 11/37] ASoC: Intel: avs: Add module " Cezary Rojewski
2021-12-08 11:12 ` [RFC 12/37] ASoC: Intel: avs: Add power " Cezary Rojewski
2021-12-08 11:12 ` [RFC 13/37] ASoC: Intel: avs: Add ROM requests Cezary Rojewski
2021-12-08 11:12 ` [RFC 14/37] ASoC: Intel: avs: Add basefw runtime-parameter requests Cezary Rojewski
2021-12-08 11:12 ` [RFC 15/37] ASoC: Intel: avs: Firmware resources management utilities Cezary Rojewski
2021-12-08 11:12 ` [RFC 16/37] ASoC: Intel: avs: Declare module configuration types Cezary Rojewski
2021-12-08 11:12 ` [RFC 17/37] ASoC: Intel: avs: Dynamic firmware resources management Cezary Rojewski
2021-12-21 14:40   ` Mark Brown
2021-12-21 17:07     ` Cezary Rojewski
2021-12-08 11:12 ` [RFC 18/37] ASoC: Intel: avs: Topology parsing Cezary Rojewski
2021-12-21 17:39   ` Mark Brown
2021-12-22 14:21     ` Cezary Rojewski
2021-12-08 11:12 ` [RFC 19/37] ASoC: Intel: avs: Path management Cezary Rojewski
2021-12-08 11:12 ` [RFC 20/37] ASoC: Intel: avs: Conditional-path support Cezary Rojewski
2021-12-08 11:12 ` [RFC 21/37] ASoC: Intel: avs: General code loading flow Cezary Rojewski
2021-12-08 11:12 ` [RFC 22/37] ASoC: Intel: avs: Implement CLDMA transfer Cezary Rojewski
2021-12-08 11:12 ` [RFC 23/37] ASoC: Intel: avs: Code loading over CLDMA Cezary Rojewski
2021-12-08 11:12 ` [RFC 24/37] ASoC: Intel: avs: Code loading over HDA Cezary Rojewski
2021-12-08 11:12 ` [RFC 25/37] ASoC: Intel: avs: Generic soc component driver Cezary Rojewski
2021-12-08 11:12 ` [RFC 26/37] ASoC: Intel: avs: Generic PCM FE operations Cezary Rojewski
2021-12-08 11:12 ` [RFC 27/37] ASoC: Intel: avs: non-HDA PCM BE operations Cezary Rojewski
2021-12-08 11:12 ` [RFC 28/37] ASoC: Intel: avs: HDA " Cezary Rojewski
2021-12-08 11:12 ` [RFC 29/37] ASoC: Intel: avs: Coredump and recovery flow Cezary Rojewski
2021-12-08 11:12 ` [RFC 30/37] ASoC: Intel: avs: Prepare for firmware tracing Cezary Rojewski
2021-12-08 11:12 ` [RFC 31/37] ASoC: Intel: avs: D0ix power state support Cezary Rojewski
2021-12-08 11:12 ` [RFC 32/37] ASoC: Intel: avs: Event tracing Cezary Rojewski
2021-12-08 11:12 ` [RFC 33/37] ASoC: Intel: avs: Machine board registration Cezary Rojewski
2021-12-08 11:12 ` [RFC 34/37] ASoC: Intel: avs: PCI driver implementation Cezary Rojewski
2021-12-08 11:12 ` [RFC 35/37] ASoC: Intel: avs: Power management Cezary Rojewski
2021-12-08 11:13 ` [RFC 36/37] ASoC: Intel: avs: SKL-based platforms support Cezary Rojewski
2021-12-08 11:13 ` [RFC 37/37] ASoC: Intel: avs: APL-based " Cezary Rojewski
2021-12-08 16:27 ` [RFC 00/37] ASoC: Intel: AVS - Audio DSP for cAVS Pierre-Louis Bossart
2021-12-08 17:51   ` Mark Brown
2021-12-09  9:59   ` Cezary Rojewski
2021-12-24 13:06 ` Mark Brown
2022-01-06 13:39   ` Cezary Rojewski
2022-01-18  9:42     ` Cezary Rojewski
2022-01-25 13:25       ` Mark Brown
2022-01-28 17:00     ` Mark Brown
2022-01-30 19:15       ` Cezary Rojewski
2022-02-02 13:26         ` Amadeusz Sławiński [this message]
2022-02-02 16:08           ` Mark Brown
2022-02-02 14:41         ` Mark Brown
2022-02-07 13:42           ` Cezary Rojewski

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