All of lore.kernel.org
 help / color / mirror / Atom feed
From: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts
Date: Wed, 5 Apr 2017 15:17:19 +0800	[thread overview]
Message-ID: <7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io> (raw)
In-Reply-To: <20170405071508.yaur35xuli4jgkfb@lukather>



在 2017年04月05日 15:15, Maxime Ripard 写道:
> On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote:
>> As we added USB0 route auto switching support for A64, add related
>> device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
>> pmu0 memory area for PHY).
>>
>> Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 1c64ea2d23f9..a8916df99048 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -179,8 +179,10 @@
>>  		usbphy: phy@01c19400 {
>>  			compatible = "allwinner,sun50i-a64-usb-phy";
>>  			reg = <0x01c19400 0x14>,
>> +			      <0x01c1a800 0x4>,
>>  			      <0x01c1b800 0x4>;
>>  			reg-names = "phy_ctrl",
>> +				    "pmu0",
>
> This breaks the older DTs, and that property isn't documented.

It's already documented.

In the H3 dual-route patchset I have already added this.

("  * "pmu0" for H3, V3s and A64")

P.S. to be compatible with older DTs, I think I should adjust
the phy driver, make it enable dual-route function only when
pmu0 is present.

>
> Maxime
>

-- 
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org
For more options, visit https://groups.google.com/d/optout.

WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (Icenowy Zheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts
Date: Wed, 5 Apr 2017 15:17:19 +0800	[thread overview]
Message-ID: <7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io> (raw)
In-Reply-To: <20170405071508.yaur35xuli4jgkfb@lukather>



? 2017?04?05? 15:15, Maxime Ripard ??:
> On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote:
>> As we added USB0 route auto switching support for A64, add related
>> device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
>> pmu0 memory area for PHY).
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 1c64ea2d23f9..a8916df99048 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -179,8 +179,10 @@
>>  		usbphy: phy at 01c19400 {
>>  			compatible = "allwinner,sun50i-a64-usb-phy";
>>  			reg = <0x01c19400 0x14>,
>> +			      <0x01c1a800 0x4>,
>>  			      <0x01c1b800 0x4>;
>>  			reg-names = "phy_ctrl",
>> +				    "pmu0",
>
> This breaks the older DTs, and that property isn't documented.

It's already documented.

In the H3 dual-route patchset I have already added this.

("  * "pmu0" for H3, V3s and A64")

P.S. to be compatible with older DTs, I think I should adjust
the phy driver, make it enable dual-route function only when
pmu0 is present.

>
> Maxime
>

  reply	other threads:[~2017-04-05  7:17 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 18:45 [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng
2017-04-05  7:15   ` Maxime Ripard
2017-04-05  7:15     ` Maxime Ripard
2017-04-05  7:17     ` Icenowy Zheng [this message]
2017-04-05  7:17       ` Icenowy Zheng
2017-04-05  7:26       ` Maxime Ripard
2017-04-05  7:26         ` Maxime Ripard
2017-04-05  7:26         ` Maxime Ripard
2017-04-05  7:33         ` Icenowy Zheng
2017-04-05  7:33           ` Icenowy Zheng
2017-04-05  8:13           ` Maxime Ripard
2017-04-05  8:13             ` Maxime Ripard
2017-04-05  8:13             ` Maxime Ripard
2017-04-04 18:45 ` [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng
2017-04-05  7:03 ` [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Maxime Ripard
2017-04-05  7:03   ` Maxime Ripard
2017-04-05  7:03   ` Maxime Ripard
2017-04-05  9:59   ` Kishon Vijay Abraham I
2017-04-05  9:59     ` Kishon Vijay Abraham I
2017-04-05  9:59     ` Kishon Vijay Abraham I
2017-04-05 12:50 [PATCH 0/3] Allwinner A64 EHCI0/OHCI0 devicetree change Icenowy Zheng
2017-04-05 12:50 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 13:05   ` Maxime Ripard
2017-04-05 13:05     ` Maxime Ripard
2017-04-05 13:05     ` Maxime Ripard

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io \
    --to=icenowy-h8g6r0blfse@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=kishon-l0cyMroinI0@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org \
    --cc=maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org \
    --cc=wens-jdAy2FN1RRM@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.