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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/13] drm/i915: Assert breadcrumbs are correctly ordered in the signal handler
Date: Fri, 3 May 2019 14:49:33 +0100	[thread overview]
Message-ID: <7d7da028-4672-8004-1ce8-d6dd8e76572a@linux.intel.com> (raw)
In-Reply-To: <155689063353.3139.2461740627641851596@skylake-alporthouse-com>


On 03/05/2019 14:37, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-05-03 14:32:59)
>>
>> On 03/05/2019 12:52, Chris Wilson wrote:
>>> Inside the signal handler, we expect the requests to be ordered by their
>>> breadcrumb such that no later request may be complete if we find an
>>> earlier incomplete. Add an assert to check that the next breadcrumb
>>> should not be logically before the current.
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> ---
>>>    drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 6 ++++++
>>>    1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
>>> index 3cbffd400b1b..a6ffb25f72a2 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
>>> @@ -99,6 +99,12 @@ void intel_engine_breadcrumbs_irq(struct intel_engine_cs *engine)
>>>                        struct i915_request *rq =
>>>                                list_entry(pos, typeof(*rq), signal_link);
>>>    
>>> +                     GEM_BUG_ON(next != &ce->signals &&
>>> +                                i915_seqno_passed(rq->fence.seqno,
>>> +                                                  list_entry(next,
>>> +                                                             typeof(*rq),
>>> +                                                             signal_link)->fence.seqno));
>>
>> I know its only GEM_BUG_ON, but why check for this in the irq handler?
>> You don't trust the insertion, or group deletion? Or just becuase it is
>> the smallest amount of code to piggy-back on existing iteration?
> 
> At this point, it's documenting the required sorting of ce->signals. The
> vulnerable part is list insertion. Would you like something like
> 
> check_signal_order(ce, rq)
> 
> and use it after insertion as well?
> 
> We can do prev/next checking, just to be sure.

I don't feel strongly either way. Was just curious why you decided to 
put it where it was.

Helper I suppose is better since it is more self-documenting and it's 
easy to call it from all strategic places.

Regards,

Tvrtko


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  reply	other threads:[~2019-05-03 13:49 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-03 11:52 [PATCH 01/13] drm/i915: Assert breadcrumbs are correctly ordered in the signal handler Chris Wilson
2019-05-03 11:52 ` [PATCH 02/13] drm/i915: Prefer checking the wakeref itself rather than the counter Chris Wilson
2019-05-07 10:48   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 03/13] drm/i915: Assert the local engine->wakeref is active Chris Wilson
2019-05-07 10:52   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 04/13] drm/i915/hangcheck: Replace hangcheck.seqno with RING_HEAD Chris Wilson
2019-05-03 11:52 ` [PATCH 05/13] drm/i915: Remove delay for idle_work Chris Wilson
2019-05-07 10:54   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 06/13] drm/i915: Cancel retire_worker on parking Chris Wilson
2019-05-07 10:55   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 07/13] drm/i915: Stop spinning for DROP_IDLE (debugfs/i915_drop_caches) Chris Wilson
2019-05-03 11:52 ` [PATCH 08/13] drm/i915: Only reschedule the submission tasklet if preemption is possible Chris Wilson
2019-05-07 11:53   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 09/13] drm/i915/execlists: Don't apply priority boost for resets Chris Wilson
2019-05-07 12:04   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 10/13] drm/i915: Rearrange i915_scheduler.c Chris Wilson
2019-05-07 12:06   ` Tvrtko Ursulin
2019-05-03 11:52 ` [PATCH 11/13] drm/i915: Pass i915_sched_node around internally Chris Wilson
2019-05-07 12:12   ` Tvrtko Ursulin
2019-05-07 12:26     ` Chris Wilson
2019-05-03 11:52 ` [PATCH 12/13] drm/i915: Bump signaler priority on adding a waiter Chris Wilson
2019-05-07 12:46   ` Tvrtko Ursulin
2019-05-07 13:14     ` Chris Wilson
2019-05-07 14:32       ` Tvrtko Ursulin
2019-05-07 14:38       ` Chris Wilson
2019-05-03 11:52 ` [PATCH 13/13] drm/i915: Disable semaphore busywaits on saturated systems Chris Wilson
2019-05-03 12:56 ` ✗ Fi.CI.SPARSE: warning for series starting with [01/13] drm/i915: Assert breadcrumbs are correctly ordered in the signal handler Patchwork
2019-05-03 13:18 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-05-03 13:32 ` [PATCH 01/13] " Tvrtko Ursulin
2019-05-03 13:37   ` Chris Wilson
2019-05-03 13:49     ` Tvrtko Ursulin [this message]
2019-05-03 15:22 ` [PATCH v2] " Chris Wilson
2019-05-07 10:39   ` Tvrtko Ursulin
2019-05-03 15:38 ` ✗ Fi.CI.SPARSE: warning for series starting with [v2] drm/i915: Assert breadcrumbs are correctly ordered in the signal handler (rev2) Patchwork
2019-05-03 15:53 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-03 19:22 ` ✗ Fi.CI.IGT: failure " Patchwork

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