All of lore.kernel.org
 help / color / mirror / Atom feed
From: Robin Murphy <robin.murphy@arm.com>
To: linucherian@gmail.com, catalin.marinas@arm.com,
	will.deacon@arm.com, lorenzo.pieralisi@arm.com,
	hanjun.guo@linaro.org, sudeep.holla@arm.com
Cc: rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org,
	robert.moore@intel.com, lv.zheng@intel.com,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
	iommu@lists.linux-foundation.org, devel@acpica.org,
	Sunil.Goutham@cavium.com, Geethasowjanya.Akula@cavium.com,
	robert.richter@cavium.com, linu.cherian@cavium.com
Subject: Re: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY
Date: Tue, 11 Apr 2017 16:43:03 +0100	[thread overview]
Message-ID: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> (raw)
In-Reply-To: <1491921765-29475-3-git-send-email-linucherian@gmail.com>

On 11/04/17 15:42, linucherian@gmail.com wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
> 
> With implementations supporting only page 0 of register space,
> resource size can be 64k as well and hence perform size checks
> based on smmu option PAGE0_REGS_ONLY.

What harm comes of mapping page 1 if we don't access it?

Robin.

> For this, arm_smmu_device_dt_probe/acpi_probe has been moved before
> platform_get_resource call, so that smmu options are set beforehand.
> 
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> ---
>  drivers/iommu/arm-smmu-v3.c | 26 +++++++++++++++++---------
>  1 file changed, 17 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index df9f27b..b326195 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2669,6 +2669,14 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
>  	return ret;
>  }
>  
> +static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu)
> +{
> +	if (ARM_SMMU_PAGE0_REGS_ONLY(smmu))
> +		return SZ_64K;
> +	else
> +		return SZ_128K;
> +}
> +
>  static int arm_smmu_device_probe(struct platform_device *pdev)
>  {
>  	int irq, ret;
> @@ -2685,9 +2693,17 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
>  	}
>  	smmu->dev = dev;
>  
> +	if (dev->of_node) {
> +		ret = arm_smmu_device_dt_probe(pdev, smmu);
> +	} else {
> +		ret = arm_smmu_device_acpi_probe(pdev, smmu);
> +		if (ret == -ENODEV)
> +			return ret;
> +	}
> +
>  	/* Base address */
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> -	if (resource_size(res) + 1 < SZ_128K) {
> +	if (resource_size(res) + 1 < arm_smmu_resource_size(smmu)) {
>  		dev_err(dev, "MMIO region too small (%pr)\n", res);
>  		return -EINVAL;
>  	}
> @@ -2714,14 +2730,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
>  	if (irq > 0)
>  		smmu->gerr_irq = irq;
>  
> -	if (dev->of_node) {
> -		ret = arm_smmu_device_dt_probe(pdev, smmu);
> -	} else {
> -		ret = arm_smmu_device_acpi_probe(pdev, smmu);
> -		if (ret == -ENODEV)
> -			return ret;
> -	}
> -
>  	/* Set bypass mode according to firmware probing result */
>  	bypass = !!ret;
>  
> 


WARNING: multiple messages have this Message-ID (diff)
From: robin.murphy@arm.com (Robin Murphy)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY
Date: Tue, 11 Apr 2017 16:43:03 +0100	[thread overview]
Message-ID: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> (raw)
In-Reply-To: <1491921765-29475-3-git-send-email-linucherian@gmail.com>

On 11/04/17 15:42, linucherian at gmail.com wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
> 
> With implementations supporting only page 0 of register space,
> resource size can be 64k as well and hence perform size checks
> based on smmu option PAGE0_REGS_ONLY.

What harm comes of mapping page 1 if we don't access it?

Robin.

> For this, arm_smmu_device_dt_probe/acpi_probe has been moved before
> platform_get_resource call, so that smmu options are set beforehand.
> 
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> ---
>  drivers/iommu/arm-smmu-v3.c | 26 +++++++++++++++++---------
>  1 file changed, 17 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index df9f27b..b326195 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2669,6 +2669,14 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
>  	return ret;
>  }
>  
> +static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu)
> +{
> +	if (ARM_SMMU_PAGE0_REGS_ONLY(smmu))
> +		return SZ_64K;
> +	else
> +		return SZ_128K;
> +}
> +
>  static int arm_smmu_device_probe(struct platform_device *pdev)
>  {
>  	int irq, ret;
> @@ -2685,9 +2693,17 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
>  	}
>  	smmu->dev = dev;
>  
> +	if (dev->of_node) {
> +		ret = arm_smmu_device_dt_probe(pdev, smmu);
> +	} else {
> +		ret = arm_smmu_device_acpi_probe(pdev, smmu);
> +		if (ret == -ENODEV)
> +			return ret;
> +	}
> +
>  	/* Base address */
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> -	if (resource_size(res) + 1 < SZ_128K) {
> +	if (resource_size(res) + 1 < arm_smmu_resource_size(smmu)) {
>  		dev_err(dev, "MMIO region too small (%pr)\n", res);
>  		return -EINVAL;
>  	}
> @@ -2714,14 +2730,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
>  	if (irq > 0)
>  		smmu->gerr_irq = irq;
>  
> -	if (dev->of_node) {
> -		ret = arm_smmu_device_dt_probe(pdev, smmu);
> -	} else {
> -		ret = arm_smmu_device_acpi_probe(pdev, smmu);
> -		if (ret == -ENODEV)
> -			return ret;
> -	}
> -
>  	/* Set bypass mode according to firmware probing result */
>  	bypass = !!ret;
>  
> 

  reply	other threads:[~2017-04-11 15:43 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-11 14:42 [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds linucherian-Re5JQEeQqe8AvxtiuMwx3w
2017-04-11 14:42 ` linucherian at gmail.com
2017-04-11 14:42 ` [RFC PATCH 1/7] iommu/arm-smmu-v3: Introduce smmu option PAGE0_REGS_ONLY for Silicon errata linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:42   ` Robin Murphy
2017-04-11 15:42     ` Robin Murphy
2017-04-12  5:05     ` Linu Cherian
2017-04-12  5:05       ` Linu Cherian
2017-04-11 14:42 ` [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:43   ` Robin Murphy [this message]
2017-04-11 15:43     ` Robin Murphy
2017-04-11 16:39     ` Sunil Kovvuri
2017-04-11 16:39       ` Sunil Kovvuri
2017-04-11 14:42 ` [RFC PATCH 3/7] iommu/arm-smmu-v3: Introduce smmu option USE_SHARED_IRQS for Silicon errata linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:54   ` Robin Murphy
2017-04-11 15:54     ` Robin Murphy
2017-04-11 16:21     ` Will Deacon
2017-04-11 16:21       ` Will Deacon
     [not found]       ` <20170411162123.GF17109-5wv7dgnIgG8@public.gmane.org>
2017-04-11 16:34         ` Sunil Kovvuri
2017-04-11 16:34           ` Sunil Kovvuri
2017-04-11 16:38       ` Robin Murphy
2017-04-11 16:38         ` Robin Murphy
     [not found]         ` <a971af83-10f1-5696-f0c6-0600c04705c3-5wv7dgnIgG8@public.gmane.org>
2017-04-11 16:41           ` Will Deacon
2017-04-11 16:41             ` Will Deacon
2017-04-11 14:42 ` [RFC PATCH 4/7] ACPICA: IORT: Add SMMuV3 model definitions linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 15:59   ` Robin Murphy
2017-04-11 15:59     ` Robin Murphy
2017-04-11 16:57     ` Sunil Kovvuri
2017-04-11 16:57       ` Sunil Kovvuri
2017-04-12  2:33       ` Hanjun Guo
2017-04-12  2:33         ` [Devel] " Hanjun Guo
2017-04-12  2:33         ` Hanjun Guo
2017-04-12 15:21       ` Lorenzo Pieralisi
2017-04-12 15:21         ` Lorenzo Pieralisi
2017-04-11 14:42 ` [RFC PATCH 5/7] iommu/arm-smmu-v3: For ACPI based device probing, set relevant options for different SMMUv3 implementations linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-12  8:43   ` Robert Richter
2017-04-12  8:43     ` Robert Richter
2017-04-12 10:32     ` Linu Cherian
2017-04-12 10:32       ` Linu Cherian
2017-04-11 14:42 ` [RFC PATCH 6/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium 99xx SMMUv3 model linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 14:42 ` [RFC PATCH 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas linucherian
2017-04-11 14:42   ` linucherian at gmail.com
2017-04-11 16:30 ` [RFC PATCH 0/7] Cavium CN99xx SMMUv3 Errata workarounds Will Deacon
2017-04-11 16:30   ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com \
    --to=robin.murphy@arm.com \
    --cc=Geethasowjanya.Akula@cavium.com \
    --cc=Sunil.Goutham@cavium.com \
    --cc=catalin.marinas@arm.com \
    --cc=devel@acpica.org \
    --cc=hanjun.guo@linaro.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=lenb@kernel.org \
    --cc=linu.cherian@cavium.com \
    --cc=linucherian@gmail.com \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=lv.zheng@intel.com \
    --cc=rjw@rjwysocki.net \
    --cc=robert.moore@intel.com \
    --cc=robert.richter@cavium.com \
    --cc=sudeep.holla@arm.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.