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From: Marc Zyngier <marc.zyngier@arm.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Christoffer Dall <christoffer.dall@linaro.org>,
	Alexander Graf <agraf@suse.de>, kvm-devel <kvm@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	"kvmarm\@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH 2/3] KVM: arm/arm64: Add ARM arch timer interrupts ABI
Date: Tue, 01 Nov 2016 16:56:47 +0000	[thread overview]
Message-ID: <86d1ifkuk0.fsf@arm.com> (raw)
In-Reply-To: <CAFEAcA_mdrTUBBDV91X3Zo6pNzVaukQ7foN+cPt_41+ouBdEfQ@mail.gmail.com> (Peter Maydell's message of "Tue, 1 Nov 2016 14:54:11 +0000")

On Tue, Nov 01 2016 at 02:54:11 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 1 November 2016 at 14:50, Christoffer Dall
> <christoffer.dall@linaro.org> wrote:
>> On Tue, Nov 01, 2016 at 11:26:54AM +0000, Peter Maydell wrote:
>>> Possible current and future outbound interrupt lines (some of these
>>> would only show up in some unlikely or lots-of-implementation-needed
>>> cases, I'm just trying to produce an exhaustive list):
>>>  * virtual timer
>>>  * physical timer
>>>  * hyp timer (nested virtualization case)
>>>  * secure timer (unlikely but maybe if EL3 is ever supported inside a VM)
>>>  * gic maintenance interrupt (nested virt again)
>>>  * PMU interrupt
>>
>> Thanks for the list, that's good to have around for the future.
>>
>> There's also the potential of the EL2 virtual timer for nested VHE
>> support, right?
>
> That's the one I meant by "hyp timer".

VHE also adds an extra virtual timer, for symmetry with what EL1
provides (and on which CNTVOFF doesn't have any effect) - see section
B8.1.1 of the ARMv8.1 addendum. So we effectively have:

- Secure physical EL3
- Non-secure physical EL1
- Non-secure virtual EL1
- Non-secure physical EL2
- Non-secure virtual EL2

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Christoffer Dall <christoffer.dall@linaro.org>,
	Alexander Graf <agraf@suse.de>, kvm-devel <kvm@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH 2/3] KVM: arm/arm64: Add ARM arch timer interrupts ABI
Date: Tue, 01 Nov 2016 16:56:47 +0000	[thread overview]
Message-ID: <86d1ifkuk0.fsf@arm.com> (raw)
In-Reply-To: <CAFEAcA_mdrTUBBDV91X3Zo6pNzVaukQ7foN+cPt_41+ouBdEfQ@mail.gmail.com> (Peter Maydell's message of "Tue, 1 Nov 2016 14:54:11 +0000")

On Tue, Nov 01 2016 at 02:54:11 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 1 November 2016 at 14:50, Christoffer Dall
> <christoffer.dall@linaro.org> wrote:
>> On Tue, Nov 01, 2016 at 11:26:54AM +0000, Peter Maydell wrote:
>>> Possible current and future outbound interrupt lines (some of these
>>> would only show up in some unlikely or lots-of-implementation-needed
>>> cases, I'm just trying to produce an exhaustive list):
>>>  * virtual timer
>>>  * physical timer
>>>  * hyp timer (nested virtualization case)
>>>  * secure timer (unlikely but maybe if EL3 is ever supported inside a VM)
>>>  * gic maintenance interrupt (nested virt again)
>>>  * PMU interrupt
>>
>> Thanks for the list, that's good to have around for the future.
>>
>> There's also the potential of the EL2 virtual timer for nested VHE
>> support, right?
>
> That's the one I meant by "hyp timer".

VHE also adds an extra virtual timer, for symmetry with what EL1
provides (and on which CNTVOFF doesn't have any effect) - see section
B8.1.1 of the ARMv8.1 addendum. So we effectively have:

- Secure physical EL3
- Non-secure physical EL1
- Non-secure virtual EL1
- Non-secure physical EL2
- Non-secure virtual EL2

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] KVM: arm/arm64: Add ARM arch timer interrupts ABI
Date: Tue, 01 Nov 2016 16:56:47 +0000	[thread overview]
Message-ID: <86d1ifkuk0.fsf@arm.com> (raw)
In-Reply-To: <CAFEAcA_mdrTUBBDV91X3Zo6pNzVaukQ7foN+cPt_41+ouBdEfQ@mail.gmail.com> (Peter Maydell's message of "Tue, 1 Nov 2016 14:54:11 +0000")

On Tue, Nov 01 2016 at 02:54:11 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 1 November 2016 at 14:50, Christoffer Dall
> <christoffer.dall@linaro.org> wrote:
>> On Tue, Nov 01, 2016 at 11:26:54AM +0000, Peter Maydell wrote:
>>> Possible current and future outbound interrupt lines (some of these
>>> would only show up in some unlikely or lots-of-implementation-needed
>>> cases, I'm just trying to produce an exhaustive list):
>>>  * virtual timer
>>>  * physical timer
>>>  * hyp timer (nested virtualization case)
>>>  * secure timer (unlikely but maybe if EL3 is ever supported inside a VM)
>>>  * gic maintenance interrupt (nested virt again)
>>>  * PMU interrupt
>>
>> Thanks for the list, that's good to have around for the future.
>>
>> There's also the potential of the EL2 virtual timer for nested VHE
>> support, right?
>
> That's the one I meant by "hyp timer".

VHE also adds an extra virtual timer, for symmetry with what EL1
provides (and on which CNTVOFF doesn't have any effect) - see section
B8.1.1 of the ARMv8.1 addendum. So we effectively have:

- Secure physical EL3
- Non-secure physical EL1
- Non-secure virtual EL1
- Non-secure physical EL2
- Non-secure virtual EL2

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.

  parent reply	other threads:[~2016-11-01 16:56 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 19:08 [PATCH 0/3] Support userspace irqchip with arch timers Christoffer Dall
2016-09-27 19:08 ` Christoffer Dall
2016-09-27 19:08 ` [PATCH 1/3] KVM: arm/arm64: Cleanup the arch timer code's irqchip checking Christoffer Dall
2016-09-27 19:08   ` Christoffer Dall
2016-09-27 19:08 ` [PATCH 2/3] KVM: arm/arm64: Add ARM arch timer interrupts ABI Christoffer Dall
2016-09-27 19:08   ` Christoffer Dall
2016-11-01 11:26   ` Peter Maydell
2016-11-01 11:26     ` Peter Maydell
2016-11-01 14:50     ` Christoffer Dall
2016-11-01 14:50       ` Christoffer Dall
2016-11-01 14:54       ` Peter Maydell
2016-11-01 14:54         ` Peter Maydell
2016-11-01 15:32         ` Christoffer Dall
2016-11-01 15:32           ` Christoffer Dall
2016-11-01 16:56         ` Marc Zyngier [this message]
2016-11-01 16:56           ` Marc Zyngier
2016-11-01 16:56           ` Marc Zyngier
2016-09-27 19:08 ` [PATCH 3/3] KVM: arm/arm64: Support arch timers with a userspace gic Christoffer Dall
2016-09-27 19:08   ` Christoffer Dall
2016-09-29 15:11 ` [PATCH 0/3] Support userspace irqchip with arch timers Alexander Graf
2016-09-29 15:11   ` Alexander Graf
2016-09-30 14:54 ` Alexander Graf
2016-09-30 14:54   ` Alexander Graf
2016-09-30 15:38   ` Alexander Graf
2016-09-30 15:38     ` Alexander Graf
2016-09-30 15:43     ` Christoffer Dall
2016-09-30 15:43       ` Christoffer Dall
2016-09-30 15:55       ` Alexander Graf
2016-09-30 15:55         ` Alexander Graf
2016-09-30 19:31       ` Alexander Graf
2016-09-30 19:31         ` Alexander Graf
2016-10-28 14:38         ` Marc Zyngier
2016-10-28 14:38           ` Marc Zyngier
2016-10-28 15:52           ` Alexander Graf
2016-10-28 15:52             ` Alexander Graf
2016-10-28 15:57             ` Marc Zyngier
2016-10-28 15:57               ` Marc Zyngier
2016-10-28 20:25               ` Alexander Graf
2016-10-28 20:25                 ` Alexander Graf
2016-10-29 13:19                 ` Paolo Bonzini
2016-10-29 13:19                   ` Paolo Bonzini
2016-10-29 18:55                   ` Alexander Graf
2016-10-29 18:55                     ` Alexander Graf

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