From: Takashi Iwai <tiwai@suse.de>
To: Mohan Kumar D <mkumard@nvidia.com>
Cc: tiwai@suse.com, perex@perex.cz, thierry.reding@gmail.com,
jonathanh@nvidia.com, linux-tegra@vger.kernel.org,
alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org
Subject: Re: [v2] ALSA: hda: Fix Nvidia dp infoframe
Date: Tue, 13 Sep 2022 09:52:37 +0200 [thread overview]
Message-ID: <871qsfhfsq.wl-tiwai@suse.de> (raw)
In-Reply-To: <5f7d294a-5040-a7a7-cee2-d62cfef5b48e@nvidia.com>
On Tue, 13 Sep 2022 09:18:52 +0200,
Mohan Kumar D wrote:
>
>
> On 9/13/2022 12:45 PM, Takashi Iwai wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Tue, 13 Sep 2022 08:58:18 +0200,
> > Mohan Kumar wrote:
> >> Nvidia HDA HW expects infoframe data bytes order same for both
> >> HDMI and DP i.e infoframe data starts from 5th bytes offset. As
> >> dp infoframe structure has 4th byte as valid infoframe data, use
> >> hdmi infoframe structure for nvidia dp infoframe to match HW behvaior.
> >>
> >> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
> > Aha, so this affects on all Nvidia devices, not only on Tegra, but
> > also on PC? Then we should put cc-to-stable definitely.
> Yes, The HDA HW design was common for dGPU and Tegra.
> >
> > (No need to resend, I can put it locally.)
> Thanks!.
OK, applied now.
thanks,
Takashi
WARNING: multiple messages have this Message-ID (diff)
From: Takashi Iwai <tiwai@suse.de>
To: Mohan Kumar D <mkumard@nvidia.com>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
tiwai@suse.com, jonathanh@nvidia.com, thierry.reding@gmail.com,
linux-tegra@vger.kernel.org
Subject: Re: [v2] ALSA: hda: Fix Nvidia dp infoframe
Date: Tue, 13 Sep 2022 09:52:37 +0200 [thread overview]
Message-ID: <871qsfhfsq.wl-tiwai@suse.de> (raw)
In-Reply-To: <5f7d294a-5040-a7a7-cee2-d62cfef5b48e@nvidia.com>
On Tue, 13 Sep 2022 09:18:52 +0200,
Mohan Kumar D wrote:
>
>
> On 9/13/2022 12:45 PM, Takashi Iwai wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Tue, 13 Sep 2022 08:58:18 +0200,
> > Mohan Kumar wrote:
> >> Nvidia HDA HW expects infoframe data bytes order same for both
> >> HDMI and DP i.e infoframe data starts from 5th bytes offset. As
> >> dp infoframe structure has 4th byte as valid infoframe data, use
> >> hdmi infoframe structure for nvidia dp infoframe to match HW behvaior.
> >>
> >> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
> > Aha, so this affects on all Nvidia devices, not only on Tegra, but
> > also on PC? Then we should put cc-to-stable definitely.
> Yes, The HDA HW design was common for dGPU and Tegra.
> >
> > (No need to resend, I can put it locally.)
> Thanks!.
OK, applied now.
thanks,
Takashi
next prev parent reply other threads:[~2022-09-13 7:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-13 6:58 [v2] ALSA: hda: Fix Nvidia dp infoframe Mohan Kumar
2022-09-13 6:58 ` Mohan Kumar
2022-09-13 7:15 ` Takashi Iwai
2022-09-13 7:15 ` Takashi Iwai
2022-09-13 7:18 ` Mohan Kumar D
2022-09-13 7:18 ` Mohan Kumar D
2022-09-13 7:52 ` Takashi Iwai [this message]
2022-09-13 7:52 ` Takashi Iwai
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