From: Marc Zyngier <maz@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: Mark-PK Tsai <mark-pk.tsai@mediatek.com>,
Daniel Palmer <daniel@thingy.jp>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Matthias Brugger <matthias.bgg@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-mediatek@lists.infradead.org, yj.chiang@mediatek.com
Subject: Re: [PATCH] irqchip/irq-mst: Support polarity configuration
Date: Sat, 06 Mar 2021 18:28:20 +0000 [thread overview]
Message-ID: <875z24rvaz.wl-maz@kernel.org> (raw)
In-Reply-To: <CAFr9PXmDp7UwWnT+49Yciy-gvYiQOd3cus0W_QnGKm-LqziHCg@mail.gmail.com>
On Sat, 06 Mar 2021 17:06:51 +0000,
Daniel Palmer <daniel@0x0f.com> wrote:
>
> Hi Mark-PK,
>
> I'm trying to understand the logic behind the changes.
> It seems like the polarity of interrupts is always the same between
> the MStar intc and the GIC? Low level interrupts are handled in the
> mstar intc and become high level interrupts to the GIC?
That's because the GIC only supports level-high input interrupts when
they are level triggered (and rising edge when edge triggered).
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: Mark-PK Tsai <mark-pk.tsai@mediatek.com>,
Daniel Palmer <daniel@thingy.jp>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Matthias Brugger <matthias.bgg@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-mediatek@lists.infradead.org, yj.chiang@mediatek.com
Subject: Re: [PATCH] irqchip/irq-mst: Support polarity configuration
Date: Sat, 06 Mar 2021 18:28:20 +0000 [thread overview]
Message-ID: <875z24rvaz.wl-maz@kernel.org> (raw)
In-Reply-To: <CAFr9PXmDp7UwWnT+49Yciy-gvYiQOd3cus0W_QnGKm-LqziHCg@mail.gmail.com>
On Sat, 06 Mar 2021 17:06:51 +0000,
Daniel Palmer <daniel@0x0f.com> wrote:
>
> Hi Mark-PK,
>
> I'm trying to understand the logic behind the changes.
> It seems like the polarity of interrupts is always the same between
> the MStar intc and the GIC? Low level interrupts are handled in the
> mstar intc and become high level interrupts to the GIC?
That's because the GIC only supports level-high input interrupts when
they are level triggered (and rising edge when edge triggered).
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: Mark-PK Tsai <mark-pk.tsai@mediatek.com>,
Daniel Palmer <daniel@thingy.jp>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Matthias Brugger <matthias.bgg@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-mediatek@lists.infradead.org, yj.chiang@mediatek.com
Subject: Re: [PATCH] irqchip/irq-mst: Support polarity configuration
Date: Sat, 06 Mar 2021 18:28:20 +0000 [thread overview]
Message-ID: <875z24rvaz.wl-maz@kernel.org> (raw)
In-Reply-To: <CAFr9PXmDp7UwWnT+49Yciy-gvYiQOd3cus0W_QnGKm-LqziHCg@mail.gmail.com>
On Sat, 06 Mar 2021 17:06:51 +0000,
Daniel Palmer <daniel@0x0f.com> wrote:
>
> Hi Mark-PK,
>
> I'm trying to understand the logic behind the changes.
> It seems like the polarity of interrupts is always the same between
> the MStar intc and the GIC? Low level interrupts are handled in the
> mstar intc and become high level interrupts to the GIC?
That's because the GIC only supports level-high input interrupts when
they are level triggered (and rising edge when edge triggered).
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-06 18:31 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-05 12:09 [PATCH] irqchip/irq-mst: Support polarity configuration Mark-PK Tsai
2021-03-05 12:09 ` Mark-PK Tsai
2021-03-05 12:09 ` Mark-PK Tsai
2021-03-06 17:06 ` Daniel Palmer
2021-03-06 17:06 ` Daniel Palmer
2021-03-06 17:06 ` Daniel Palmer
2021-03-06 18:28 ` Marc Zyngier [this message]
2021-03-06 18:28 ` Marc Zyngier
2021-03-06 18:28 ` Marc Zyngier
2021-03-08 2:42 ` Mark-PK Tsai (蔡沛剛)
2021-03-08 13:06 ` Daniel Palmer
2021-03-08 13:06 ` Daniel Palmer
2021-03-08 13:06 ` Daniel Palmer
2021-03-06 18:36 ` Marc Zyngier
2021-03-06 18:36 ` Marc Zyngier
2021-03-06 18:36 ` Marc Zyngier
2021-03-08 3:01 ` Mark-PK Tsai
2021-03-08 3:01 ` Mark-PK Tsai
2021-03-08 3:01 ` Mark-PK Tsai
2021-03-08 9:09 ` Marc Zyngier
2021-03-08 9:09 ` Marc Zyngier
2021-03-08 9:09 ` Marc Zyngier
2021-03-08 14:31 ` Mark-PK Tsai
2021-03-08 14:31 ` Mark-PK Tsai
2021-03-08 14:31 ` Mark-PK Tsai
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