From: Jani Nikula <jani.nikula@linux.intel.com>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Thomas Zimmermann <tzimmermann@suse.de>,
Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 1/2] drm/dp_helper: Define options for FRL training for HDMI2.1 PCON
Date: Wed, 31 Mar 2021 13:21:14 +0300 [thread overview]
Message-ID: <87h7kroc85.fsf@intel.com> (raw)
In-Reply-To: <20210326145937.wfyxm4harrdi43c3@gilmour>
On Fri, 26 Mar 2021, Maxime Ripard <maxime@cerno.tech> wrote:
> Hi,
>
> On Fri, Mar 26, 2021 at 11:47:58AM +0200, Jani Nikula wrote:
>> On Tue, 23 Mar 2021, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> > Currently the FRL training mode (Concurrent, Sequential) and
>> > training type (Normal, Extended) are not defined properly and
>> > are passed as bool values in drm_helpers for pcon
>> > configuration for FRL training.
>> >
>> > This patch:
>> > -Add register masks for Sequential and Normal FRL training options.
>> > -Fixes the drm_helpers for FRL Training configuration to use the
>> > appropriate masks.
>> > -Modifies the calls to the above drm_helpers in i915/intel_dp as per
>> > the above change.
>> >
>> > v2: Re-used the register masks for these options, instead of enum. (Ville)
>> >
>> > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Maarten, Maxime, Thomas -
>>
>> Can I get an ack for merging this via drm-intel-next, please?
>
> I was hoping that someone with either i915 or DP knowledge would
> comment, but the patch looks fine to me, you can go ahead I guess :)
Thanks for the patch, review, and ack, pushed the lot to drm-intel-next.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Thomas Zimmermann <tzimmermann@suse.de>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 1/2] drm/dp_helper: Define options for FRL training for HDMI2.1 PCON
Date: Wed, 31 Mar 2021 13:21:14 +0300 [thread overview]
Message-ID: <87h7kroc85.fsf@intel.com> (raw)
In-Reply-To: <20210326145937.wfyxm4harrdi43c3@gilmour>
On Fri, 26 Mar 2021, Maxime Ripard <maxime@cerno.tech> wrote:
> Hi,
>
> On Fri, Mar 26, 2021 at 11:47:58AM +0200, Jani Nikula wrote:
>> On Tue, 23 Mar 2021, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> > Currently the FRL training mode (Concurrent, Sequential) and
>> > training type (Normal, Extended) are not defined properly and
>> > are passed as bool values in drm_helpers for pcon
>> > configuration for FRL training.
>> >
>> > This patch:
>> > -Add register masks for Sequential and Normal FRL training options.
>> > -Fixes the drm_helpers for FRL Training configuration to use the
>> > appropriate masks.
>> > -Modifies the calls to the above drm_helpers in i915/intel_dp as per
>> > the above change.
>> >
>> > v2: Re-used the register masks for these options, instead of enum. (Ville)
>> >
>> > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Maarten, Maxime, Thomas -
>>
>> Can I get an ack for merging this via drm-intel-next, please?
>
> I was hoping that someone with either i915 or DP knowledge would
> comment, but the patch looks fine to me, you can go ahead I guess :)
Thanks for the patch, review, and ack, pushed the lot to drm-intel-next.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-03-31 10:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 11:24 [PATCH v5 0/2] HDMI2.1 PCON Misc Fixes Ankit Nautiyal
2021-03-23 11:24 ` [Intel-gfx] " Ankit Nautiyal
2021-03-23 11:24 ` [PATCH v5 1/2] drm/dp_helper: Define options for FRL training for HDMI2.1 PCON Ankit Nautiyal
2021-03-23 11:24 ` [Intel-gfx] " Ankit Nautiyal
2021-03-26 9:47 ` Jani Nikula
2021-03-26 9:47 ` Jani Nikula
2021-03-26 14:59 ` Maxime Ripard
2021-03-26 14:59 ` Maxime Ripard
2021-03-31 10:21 ` Jani Nikula [this message]
2021-03-31 10:21 ` Jani Nikula
2021-03-23 11:24 ` [PATCH v5 2/2] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available Ankit Nautiyal
2021-03-23 11:24 ` [Intel-gfx] " Ankit Nautiyal
2021-03-23 15:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDMI2.1 PCON Misc Fixes (rev5) Patchwork
2021-03-23 15:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-03-24 12:13 ` Nautiyal, Ankit K
2021-03-24 16:26 ` Vudum, Lakshminarayana
2021-03-24 16:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-25 1:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87h7kroc85.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=ankit.k.nautiyal@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=maxime@cerno.tech \
--cc=tzimmermann@suse.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.