Re: [Intel-gfx] [PATCH v4 1/4] drm/i915/mso: add splitter state readout for platforms that support it

From: Jani Nikula <jani.nikula@intel.com>
To: "Shankar\, Uma" <uma.shankar@intel.com>,
	"intel-gfx\@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Varide, Nischal" <nischal.varide@intel.com>
Subject: Re: [Intel-gfx] [PATCH v4 1/4] drm/i915/mso: add splitter state readout for platforms that support it
Date: Thu, 04 Mar 2021 10:33:11 +0200	[thread overview]
Message-ID: <87r1kvnws8.fsf@intel.com> (raw)
In-Reply-To: <9fc4a8dd74894b9fb18282223193d362@intel.com>

On Wed, 03 Mar 2021, "Shankar, Uma" <uma.shankar@intel.com> wrote:
> Looks Good to me.
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>

Thanks for the review, pushed the series.

>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 1a76e1d9de7a..9f1945018712 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1166,6 +1166,13 @@ struct intel_crtc_state {
>>  		u8 pipeline_full;
>>  		u16 flipline, vmin, vmax;
>>  	} vrr;
>> +
>> +	/* Stream Splitter for eDP MSO */
>> +	struct {
>> +		bool enable;
>> +		u8 link_count;
>> +		u8 pixel_overlap;
>> +	} splitter;
>>  };

Due to certain amount of urgency, I decided to push the series with this
naming in crtc state. I think it's accurate now, and workable for legacy
DSI as well. However, I'm not hung up on it, and I'm open to renaming
when the time comes to convert legacy DSI to using crtc state for this
stuff.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center
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