From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 03/14] drm/i915: s/gmch_{m,n}/data_{m,n}/
Date: Thu, 27 Jan 2022 13:18:33 +0200 [thread overview]
Message-ID: <87tudpwho6.fsf@intel.com> (raw)
In-Reply-To: <20220127093303.17309-4-ville.syrjala@linux.intel.com>
On Thu, 27 Jan 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Rename the gmch_* M/N members to data_* to match the register
> definitions and thus make life a little less confusing.
Yes, please!
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
> drivers/gpu/drm/i915/display/intel_display.c | 48 ++++++++++----------
> drivers/gpu/drm/i915/display/intel_display.h | 4 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
> 5 files changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 5d1f7d6218c5..ca8becb07e45 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3684,8 +3684,8 @@ static bool m_n_equal(const struct intel_link_m_n *m_n_1,
> const struct intel_link_m_n *m_n_2)
> {
> return m_n_1->tu == m_n_2->tu &&
> - m_n_1->gmch_m == m_n_2->gmch_m &&
> - m_n_1->gmch_n == m_n_2->gmch_n &&
> + m_n_1->data_m == m_n_2->data_m &&
> + m_n_1->data_n == m_n_2->data_n &&
> m_n_1->link_m == m_n_2->link_m &&
> m_n_1->link_n == m_n_2->link_n;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d91164d1eb92..75de794185b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3082,7 +3082,7 @@ intel_link_compute_m_n(u16 bits_per_pixel, int nlanes,
> m_n->tu = 64;
> compute_m_n(data_clock,
> link_clock * nlanes * 8,
> - &m_n->gmch_m, &m_n->gmch_n,
> + &m_n->data_m, &m_n->data_n,
> constant_n);
>
> compute_m_n(pixel_clock, link_clock,
> @@ -3118,8 +3118,8 @@ static void intel_set_m_n(struct drm_i915_private *i915,
> i915_reg_t data_m_reg, i915_reg_t data_n_reg,
> i915_reg_t link_m_reg, i915_reg_t link_n_reg)
> {
> - intel_de_write(i915, data_m_reg, TU_SIZE(m_n->tu) | m_n->gmch_m);
> - intel_de_write(i915, data_n_reg, m_n->gmch_n);
> + intel_de_write(i915, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
> + intel_de_write(i915, data_n_reg, m_n->data_n);
> intel_de_write(i915, link_m_reg, m_n->link_m);
> intel_de_write(i915, link_n_reg, m_n->link_n);
> }
> @@ -3867,8 +3867,8 @@ static void intel_get_m_n(struct drm_i915_private *i915,
> {
> m_n->link_m = intel_de_read(i915, link_m_reg) & DATA_LINK_M_N_MASK;
> m_n->link_n = intel_de_read(i915, link_n_reg) & DATA_LINK_M_N_MASK;
> - m_n->gmch_m = intel_de_read(i915, data_m_reg) & DATA_LINK_M_N_MASK;
> - m_n->gmch_n = intel_de_read(i915, data_n_reg) & DATA_LINK_M_N_MASK;
> + m_n->data_m = intel_de_read(i915, data_m_reg) & DATA_LINK_M_N_MASK;
> + m_n->data_n = intel_de_read(i915, data_n_reg) & DATA_LINK_M_N_MASK;
> m_n->tu = REG_FIELD_GET(TU_SIZE_MASK, intel_de_read(i915, data_m_reg)) + 1;
> }
>
> @@ -5498,9 +5498,9 @@ intel_dump_m_n_config(const struct intel_crtc_state *pipe_config,
> struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);
>
> drm_dbg_kms(&i915->drm,
> - "%s: lanes: %i; gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
> + "%s: lanes: %i; data_m: %u, data_n: %u, link_m: %u, link_n: %u, tu: %u\n",
> id, lane_count,
> - m_n->gmch_m, m_n->gmch_n,
> + m_n->data_m, m_n->data_n,
> m_n->link_m, m_n->link_n, m_n->tu);
> }
>
> @@ -6196,8 +6196,8 @@ intel_compare_link_m_n(const struct intel_link_m_n *m_n,
> bool exact)
> {
> return m_n->tu == m2_n2->tu &&
> - intel_compare_m_n(m_n->gmch_m, m_n->gmch_n,
> - m2_n2->gmch_m, m2_n2->gmch_n, exact) &&
> + intel_compare_m_n(m_n->data_m, m_n->data_n,
> + m2_n2->data_m, m2_n2->data_n, exact) &&
> intel_compare_m_n(m_n->link_m, m_n->link_n,
> m2_n2->link_m, m2_n2->link_n, exact);
> }
> @@ -6396,16 +6396,16 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> &pipe_config->name,\
> !fastset)) { \
> pipe_config_mismatch(fastset, crtc, __stringify(name), \
> - "(expected tu %i gmch %i/%i link %i/%i, " \
> - "found tu %i, gmch %i/%i link %i/%i)", \
> + "(expected tu %i data %i/%i link %i/%i, " \
> + "found tu %i, data %i/%i link %i/%i)", \
> current_config->name.tu, \
> - current_config->name.gmch_m, \
> - current_config->name.gmch_n, \
> + current_config->name.data_m, \
> + current_config->name.data_n, \
> current_config->name.link_m, \
> current_config->name.link_n, \
> pipe_config->name.tu, \
> - pipe_config->name.gmch_m, \
> - pipe_config->name.gmch_n, \
> + pipe_config->name.data_m, \
> + pipe_config->name.data_n, \
> pipe_config->name.link_m, \
> pipe_config->name.link_n); \
> ret = false; \
> @@ -6423,22 +6423,22 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> !intel_compare_link_m_n(¤t_config->alt_name, \
> &pipe_config->name, !fastset)) { \
> pipe_config_mismatch(fastset, crtc, __stringify(name), \
> - "(expected tu %i gmch %i/%i link %i/%i, " \
> - "or tu %i gmch %i/%i link %i/%i, " \
> - "found tu %i, gmch %i/%i link %i/%i)", \
> + "(expected tu %i data %i/%i link %i/%i, " \
> + "or tu %i data %i/%i link %i/%i, " \
> + "found tu %i, data %i/%i link %i/%i)", \
> current_config->name.tu, \
> - current_config->name.gmch_m, \
> - current_config->name.gmch_n, \
> + current_config->name.data_m, \
> + current_config->name.data_n, \
> current_config->name.link_m, \
> current_config->name.link_n, \
> current_config->alt_name.tu, \
> - current_config->alt_name.gmch_m, \
> - current_config->alt_name.gmch_n, \
> + current_config->alt_name.data_m, \
> + current_config->alt_name.data_n, \
> current_config->alt_name.link_m, \
> current_config->alt_name.link_n, \
> pipe_config->name.tu, \
> - pipe_config->name.gmch_m, \
> - pipe_config->name.gmch_n, \
> + pipe_config->name.data_m, \
> + pipe_config->name.data_n, \
> pipe_config->name.link_m, \
> pipe_config->name.link_n); \
> ret = false; \
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index b61b75248ded..a241007f5c82 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -317,8 +317,8 @@ enum aux_ch {
> /* Used by dp and fdi links */
> struct intel_link_m_n {
> u32 tu;
> - u32 gmch_m;
> - u32 gmch_n;
> + u32 data_m;
> + u32 data_n;
> u32 link_m;
> u32 link_n;
> };
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4d4579a301f6..146b83916005 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1895,7 +1895,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>
> /* FIXME: abstract this better */
> if (pipe_config->splitter.enable)
> - pipe_config->dp_m_n.gmch_m *= pipe_config->splitter.link_count;
> + pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
>
> if (!HAS_DDI(dev_priv))
> g4x_dp_set_clock(encoder, pipe_config);
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index c1439fcb5a95..46be46f2c47e 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -84,7 +84,7 @@ intel_drrs_compute_config(struct intel_dp *intel_dp,
>
> /* FIXME: abstract this better */
> if (pipe_config->splitter.enable)
> - pipe_config->dp_m2_n2.gmch_m *= pipe_config->splitter.link_count;
> + pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count;
> }
>
> static void intel_drrs_set_state(struct drm_i915_private *dev_priv,
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-01-27 11:18 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 9:32 [Intel-gfx] [PATCH 00/14] drm/i915: M/N cleanup Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 01/14] drm/i915: Extract intel_{get,set}_m_n() Ville Syrjala
2022-01-27 11:11 ` [Intel-gfx] [PATCH 01/14] drm/i915: Extract intel_{get, set}_m_n() Jani Nikula
2022-01-27 9:32 ` [Intel-gfx] [PATCH 02/14] drm/i915: Clean up M/N register defines Ville Syrjala
2022-01-27 11:17 ` Jani Nikula
2022-01-27 11:32 ` Ville Syrjälä
2022-01-27 11:41 ` Jani Nikula
2022-01-27 12:02 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-01-27 17:36 ` [Intel-gfx] [PATCH " kernel test robot
2022-01-27 17:36 ` kernel test robot
2022-01-27 9:32 ` [Intel-gfx] [PATCH 03/14] drm/i915: s/gmch_{m,n}/data_{m,n}/ Ville Syrjala
2022-01-27 11:18 ` Jani Nikula [this message]
2022-01-27 9:32 ` [Intel-gfx] [PATCH 04/14] drm/i915: Move drrs hardware bit frobbing to small helpers Ville Syrjala
2022-01-27 11:23 ` Jani Nikula
2022-01-27 11:24 ` Jani Nikula
2022-01-27 11:35 ` Ville Syrjälä
2022-01-27 11:42 ` Jani Nikula
2022-01-27 9:32 ` [Intel-gfx] [PATCH 05/14] drm/i915: Make M/N set/get a bit more direct Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 06/14] drm/i915: Move PCH transcoder M/N setup into the PCH code Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 07/14] drm/i915: Move M/N setup to a more logical place on ddi platforms Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 08/14] drm/i915: Extract {i9xx, ilk}_configure_cpu_transcoder() Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 09/14] drm/i915: Add fdi_m2_n2 Ville Syrjala
2022-01-27 9:32 ` [Intel-gfx] [PATCH 10/14] drm/i915: Program FDI RX TUSIZE2 Ville Syrjala
2022-01-27 9:33 ` [Intel-gfx] [PATCH 11/14] drm/i915: Dump dp_m2_n2 always Ville Syrjala
2022-01-27 9:33 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract can_enable_drrs() Ville Syrjala
2022-01-27 9:33 ` [Intel-gfx] [PATCH 13/14] drm/i915: Set DP M2/N2 equal to M1/N1 when not doing DRRS Ville Syrjala
2022-01-27 9:33 ` [Intel-gfx] [PATCH 14/14] drm/i915: Always check dp_m2_n2 on pre-bdw Ville Syrjala
2022-01-27 11:01 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: M/N cleanup Patchwork
2022-01-27 14:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: M/N cleanup (rev2) Patchwork
2022-01-27 15:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-27 19:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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