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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/14] drm/i915: Move drrs hardware bit frobbing to small helpers
Date: Thu, 27 Jan 2022 13:35:14 +0200	[thread overview]
Message-ID: <YfKDcoJKVdJtPPz3@intel.com> (raw)
In-Reply-To: <87o83xwhey.fsf@intel.com>

On Thu, Jan 27, 2022 at 01:24:05PM +0200, Jani Nikula wrote:
> On Thu, 27 Jan 2022, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Thu, 27 Jan 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Split the drrs code that actually changes the refresh rate
> >> (via PIPECONF or M/N values) to small helper functions that
> >> only deal with the hardware details an nothing else. We'll
> >> soon have a third way of doing this, and it's less confusing
> >> when each difference method lives in its own funciton.
> >>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_drrs.c | 67 ++++++++++++-----------
> >>  1 file changed, 36 insertions(+), 31 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> >> index 46be46f2c47e..0cacdb174fd0 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> >> @@ -87,6 +87,38 @@ intel_drrs_compute_config(struct intel_dp *intel_dp,
> >>  		pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count;
> >>  }
> >>  
> >> +static void
> >> +intel_drrs_set_refresh_rate_pipeconf(const struct intel_crtc_state *crtc_state,
> >> +				     enum drrs_refresh_rate_type refresh_type)
> >
> > Side note, for future, does this really need to be an enum? Could it
> > just be a bool "reduced" or something?
> 
> And I mean throughout the driver, not just right here.

I suppose a bool would suffice. I was going to rename it to
at least have a bit more consistent namespace, but perhaps
we could just nuke it entirely.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-01-27 11:35 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-27  9:32 [Intel-gfx] [PATCH 00/14] drm/i915: M/N cleanup Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 01/14] drm/i915: Extract intel_{get,set}_m_n() Ville Syrjala
2022-01-27 11:11   ` [Intel-gfx] [PATCH 01/14] drm/i915: Extract intel_{get, set}_m_n() Jani Nikula
2022-01-27  9:32 ` [Intel-gfx] [PATCH 02/14] drm/i915: Clean up M/N register defines Ville Syrjala
2022-01-27 11:17   ` Jani Nikula
2022-01-27 11:32     ` Ville Syrjälä
2022-01-27 11:41       ` Jani Nikula
2022-01-27 12:02   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-01-27 17:36   ` [Intel-gfx] [PATCH " kernel test robot
2022-01-27 17:36     ` kernel test robot
2022-01-27  9:32 ` [Intel-gfx] [PATCH 03/14] drm/i915: s/gmch_{m,n}/data_{m,n}/ Ville Syrjala
2022-01-27 11:18   ` Jani Nikula
2022-01-27  9:32 ` [Intel-gfx] [PATCH 04/14] drm/i915: Move drrs hardware bit frobbing to small helpers Ville Syrjala
2022-01-27 11:23   ` Jani Nikula
2022-01-27 11:24     ` Jani Nikula
2022-01-27 11:35       ` Ville Syrjälä [this message]
2022-01-27 11:42         ` Jani Nikula
2022-01-27  9:32 ` [Intel-gfx] [PATCH 05/14] drm/i915: Make M/N set/get a bit more direct Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 06/14] drm/i915: Move PCH transcoder M/N setup into the PCH code Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 07/14] drm/i915: Move M/N setup to a more logical place on ddi platforms Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 08/14] drm/i915: Extract {i9xx, ilk}_configure_cpu_transcoder() Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 09/14] drm/i915: Add fdi_m2_n2 Ville Syrjala
2022-01-27  9:32 ` [Intel-gfx] [PATCH 10/14] drm/i915: Program FDI RX TUSIZE2 Ville Syrjala
2022-01-27  9:33 ` [Intel-gfx] [PATCH 11/14] drm/i915: Dump dp_m2_n2 always Ville Syrjala
2022-01-27  9:33 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract can_enable_drrs() Ville Syrjala
2022-01-27  9:33 ` [Intel-gfx] [PATCH 13/14] drm/i915: Set DP M2/N2 equal to M1/N1 when not doing DRRS Ville Syrjala
2022-01-27  9:33 ` [Intel-gfx] [PATCH 14/14] drm/i915: Always check dp_m2_n2 on pre-bdw Ville Syrjala
2022-01-27 11:01 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: M/N cleanup Patchwork
2022-01-27 14:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: M/N cleanup (rev2) Patchwork
2022-01-27 15:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-27 19:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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