From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Billy Tsai" <billy_tsai@aspeedtech.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Joel Stanley" <joel@jms.id.au>,
linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: BMC-SW@aspeedtech.com
Subject: Re: [PATCH v3] driver: aspeed: g6: Fix PWMG0 pinctrl setting
Date: Fri, 18 Dec 2020 12:33:50 +1030 [thread overview]
Message-ID: <890073c1-3905-4602-83f7-b823c4a4ee13@www.fastmail.com> (raw)
In-Reply-To: <20201217024912.3198-1-billy_tsai@aspeedtech.com>
On Thu, 17 Dec 2020, at 13:19, Billy Tsai wrote:
> The SCU offset for signal PWM8 in group PWM8G0 is wrong, fix it from
> SCU414 to SCU4B4.
>
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Thanks Billy.
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> index b673a44ffa3b..aa53e9d3489b 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> @@ -367,7 +367,7 @@ FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25,
> C24, B26, B25, B24);
>
> #define D22 40
> SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
> -SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU414, 8));
> +SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8));
> PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
> GROUP_DECL(PWM8G0, D22);
>
> --
> 2.17.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Billy Tsai" <billy_tsai@aspeedtech.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Joel Stanley" <joel@jms.id.au>,
linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: BMC-SW@aspeedtech.com
Subject: Re: [PATCH v3] driver: aspeed: g6: Fix PWMG0 pinctrl setting
Date: Fri, 18 Dec 2020 12:33:50 +1030 [thread overview]
Message-ID: <890073c1-3905-4602-83f7-b823c4a4ee13@www.fastmail.com> (raw)
In-Reply-To: <20201217024912.3198-1-billy_tsai@aspeedtech.com>
On Thu, 17 Dec 2020, at 13:19, Billy Tsai wrote:
> The SCU offset for signal PWM8 in group PWM8G0 is wrong, fix it from
> SCU414 to SCU4B4.
>
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Thanks Billy.
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> index b673a44ffa3b..aa53e9d3489b 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> @@ -367,7 +367,7 @@ FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25,
> C24, B26, B25, B24);
>
> #define D22 40
> SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
> -SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU414, 8));
> +SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8));
> PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
> GROUP_DECL(PWM8G0, D22);
>
> --
> 2.17.1
>
>
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next prev parent reply other threads:[~2020-12-18 2:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 0:37 [PATCH v2] driver: aspeed: g6: Fix PWMG0 pinctrl setting Andrew Jeffery
2020-12-17 0:37 ` Andrew Jeffery
2020-12-17 2:38 ` Billy Tsai
2020-12-17 2:38 ` Billy Tsai
2020-12-17 2:38 ` Billy Tsai
2020-12-17 2:49 ` [PATCH v3] " Billy Tsai
2020-12-17 2:49 ` Billy Tsai
2020-12-17 2:49 ` Billy Tsai
2020-12-17 3:26 ` Joel Stanley
2020-12-17 3:26 ` Joel Stanley
2020-12-17 3:26 ` Joel Stanley
2020-12-18 2:03 ` Andrew Jeffery [this message]
2020-12-18 2:03 ` Andrew Jeffery
2021-01-04 15:03 ` Linus Walleij
2021-01-04 15:03 ` Linus Walleij
2021-01-04 15:03 ` Linus Walleij
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