Re: [PATCH v11 12/12] dmaengine: imx-sdma: add uart rom script

From: Frieder Schrempf <frieder.schrempf@kontron.de>
To: Robin Gong <yibin.gong@nxp.com>,
	mark.rutland@arm.com, broonie@kernel.org, robh+dt@kernel.org,
	catalin.marinas@arm.com, vkoul@kernel.org, will.deacon@arm.com,
	shawnguo@kernel.org, festevam@gmail.com, s.hauer@pengutronix.de,
	martin.fuzzey@flowbird.group, u.kleine-koenig@pengutronix.de,
	dan.j.williams@intel.com, matthias.schiffer@ew.tq-group.com
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	kernel@pengutronix.de, dmaengine@vger.kernel.org,
	linux-imx@nxp.com
Subject: Re: [PATCH v11 12/12] dmaengine: imx-sdma: add uart rom script
Date: Mon, 10 Aug 2020 09:32:44 +0200	[thread overview]
Message-ID: <89946dc6-6c0f-b3d5-9c9a-517f1ed7b5e1@kontron.de> (raw)
In-Reply-To: <1595616685-9987-13-git-send-email-yibin.gong@nxp.com>

Hi Robin,

On 24.07.20 20:51, Robin Gong wrote:
> For the compatibility of NXP internal legacy kernel before 4.19 which
> is based on uart ram script and upstreaming kernel based on uart rom
> script, add both uart ram/rom script in latest sdma firmware. By default
> uart rom script used.
> Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and add
> back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for i.mx6).
> 
> rom script:
>          uart_2_mcu_addr
> 	uartsh_2_mcu_addr /* through spba bus */
> am script:
> 	uart_2_mcu_ram_addr
> 	uartsh_2_mcu_ram_addr /* through spba bus */
> 
> Please get latest sdma firmware from the below and put them into the path
> (/lib/firmware/imx/sdma/):
> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-firmware.git&amp;data=02%7C01%7Cfrieder.schrempf%40kontron.de%7Caa98331fadca476ca15c08d82fbdaf32%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637311839017457806&amp;sdata=cbM33k4fdr0IAni1njQWgIrzxbEJ%2BQBkxN10fnagO6k%3D&amp;reserved=0
> /tree/imx/sdma
> 
> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> Acked-by: Vinod Koul <vkoul@kernel.org>

This patch seems to break UART DMA in case the ROM firmware is used. In 
that case sdma->script_number is set to SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1, 
so the ROM scripts at uart_2_mcu_addr and uartsh_2_mcu_addr will never 
be added in sdma_add_scripts() as they are now moved beyond the V1 max 
index.

Reverting this patch fixes UART DMA with ROM firmware.
Can you please find a way to fix this or just drop this change?

Thanks,
Frieder

> ---
>   drivers/dma/imx-sdma.c                     | 4 ++--
>   include/linux/platform_data/dma-imx-sdma.h | 8 ++++++--
>   2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index 8735606..5900e32 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -1729,8 +1729,8 @@ static void sdma_issue_pending(struct dma_chan *chan)
>   
>   #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1	34
>   #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2	38
> -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3	41
> -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4	42
> +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3	45
> +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4	46
>   
>   static void sdma_add_scripts(struct sdma_engine *sdma,
>   		const struct sdma_script_start_addrs *addr)
> diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h
> index 30e676b..e12d2e8 100644
> --- a/include/linux/platform_data/dma-imx-sdma.h
> +++ b/include/linux/platform_data/dma-imx-sdma.h
> @@ -20,12 +20,12 @@ struct sdma_script_start_addrs {
>   	s32 per_2_firi_addr;
>   	s32 mcu_2_firi_addr;
>   	s32 uart_2_per_addr;
> -	s32 uart_2_mcu_addr;
> +	s32 uart_2_mcu_ram_addr;
>   	s32 per_2_app_addr;
>   	s32 mcu_2_app_addr;
>   	s32 per_2_per_addr;
>   	s32 uartsh_2_per_addr;
> -	s32 uartsh_2_mcu_addr;
> +	s32 uartsh_2_mcu_ram_addr;
>   	s32 per_2_shp_addr;
>   	s32 mcu_2_shp_addr;
>   	s32 ata_2_mcu_addr;
> @@ -52,6 +52,10 @@ struct sdma_script_start_addrs {
>   	s32 zcanfd_2_mcu_addr;
>   	s32 zqspi_2_mcu_addr;
>   	s32 mcu_2_ecspi_addr;
> +	s32 mcu_2_sai_addr;
> +	s32 sai_2_mcu_addr;
> +	s32 uart_2_mcu_addr;
> +	s32 uartsh_2_mcu_addr;
>   	/* End of v3 array */
>   	s32 mcu_2_zqspi_addr;
>   	/* End of v4 array */
> 