From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Arnd Bergmann <arnd@kernel.org>, Matthew Wilcox <willy@infradead.org>
Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com>,
"grygorii.strashko@ti.com" <grygorii.strashko@ti.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
"mhocko@kernel.org" <mhocko@kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"mgorman@suse.de" <mgorman@suse.de>,
"brouer@redhat.com" <brouer@redhat.com>,
"mcroce@linux.microsoft.com" <mcroce@linux.microsoft.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"hch@lst.de" <hch@lst.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] mm: Fix struct page layout on 32-bit systems
Date: Tue, 20 Apr 2021 21:14:12 +0000 [thread overview]
Message-ID: <8d0fce1c-be7c-1c9b-bf5c-0c531db496ac@synopsys.com> (raw)
In-Reply-To: <CAK8P3a0KUwf1Z0bHiUaHC2nHztevkxg5_FBSzHddNeSsBayWUA@mail.gmail.com>
On 4/20/21 12:07 AM, Arnd Bergmann wrote:
> On Tue, Apr 20, 2021 at 5:10 AM Matthew Wilcox <willy@infradead.org> wrote:
>> On Tue, Apr 20, 2021 at 02:48:17AM +0000, Vineet Gupta wrote:
>>>> 32-bit architectures which expect 8-byte alignment for 8-byte integers
>>>> and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
>>>> page inadvertently expanded in 2019.
>>> FWIW, ARC doesn't require 8 byte alignment for 8 byte integers. This is
>>> only needed for 8-byte atomics due to the requirements of LLOCKD/SCOND
>>> instructions.
>> Ah, like x86? OK, great, I'll drop your arch from the list of
>> affected. Thanks!
> I mistakenly assumed that i386 and m68k were the only supported
> architectures with 32-bit alignment on u64. I checked it now and found
>
> $ for i in /home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/*-gcc ; do
> echo `echo 'int a = __alignof__(long long);' | $i -xc - -Wall -S -o- |
> grep -A1 a: | tail -n 1 | cut -f 3 -d\ `
> ${i#/home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/} ; done
> 8 aarch64-linux-gcc
> 8 alpha-linux-gcc
> 4 arc-linux-gcc
> 8 arm-linux-gnueabi-gcc
> 8 c6x-elf-gcc
> 4 csky-linux-gcc
> 4 h8300-linux-gcc
> 8 hppa-linux-gcc
> 8 hppa64-linux-gcc
> 8 i386-linux-gcc
> 8 ia64-linux-gcc
> 2 m68k-linux-gcc
> 4 microblaze-linux-gcc
> 8 mips-linux-gcc
> 8 mips64-linux-gcc
> 8 nds32le-linux-gcc
> 4 nios2-linux-gcc
> 4 or1k-linux-gcc
> 8 powerpc-linux-gcc
> 8 powerpc64-linux-gcc
> 8 riscv32-linux-gcc
> 8 riscv64-linux-gcc
> 8 s390-linux-gcc
> 4 sh2-linux-gcc
> 4 sh4-linux-gcc
> 8 sparc-linux-gcc
> 8 sparc64-linux-gcc
> 8 x86_64-linux-gcc
> 8 xtensa-linux-gcc
>
> which means that half the 32-bit architectures do this. This may
> cause more problems when arc and/or microblaze want to support
> 64-bit kernels and compat mode in the future on their latest hardware,
> as that means duplicating the x86 specific hacks we have for compat.
>
> What is alignof(u64) on 64-bit arc?
$ echo 'int a = __alignof__(long long);' | arc64-linux-gnu-gcc -xc -
-Wall -S -o - | grep -A1 a: | tail -n 1 | cut -f 3
8
Yeah ARCv2 alignment of 4 for 64-bit data was a bit of surprise finding
for me as well. When 64-bit load/stores were initially targeted by the
internal Metaware compiler (llvm based) they decided to keep alignment
to 4 still (granted hardware allowed this) and then gcc guys decided to
follow the same ABI. I only found this by accident :-)
Can you point me to some specifics on the compat issue. For better of
worse, arc64 does''t have a compat 32-bit mode, so everything is
64-on-64 or 32-on-32 (ARC32 flavor of ARCv3)
Thx,
-Vineet
WARNING: multiple messages have this Message-ID (diff)
From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Arnd Bergmann <arnd@kernel.org>, Matthew Wilcox <willy@infradead.org>
Cc: "grygorii.strashko@ti.com" <grygorii.strashko@ti.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
Vineet Gupta <Vineet.Gupta1@synopsys.com>,
"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"mgorman@suse.de" <mgorman@suse.de>,
"brouer@redhat.com" <brouer@redhat.com>,
"mcroce@linux.microsoft.com" <mcroce@linux.microsoft.com>,
"mhocko@kernel.org" <mhocko@kernel.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"hch@lst.de" <hch@lst.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] mm: Fix struct page layout on 32-bit systems
Date: Tue, 20 Apr 2021 21:14:12 +0000 [thread overview]
Message-ID: <8d0fce1c-be7c-1c9b-bf5c-0c531db496ac@synopsys.com> (raw)
In-Reply-To: <CAK8P3a0KUwf1Z0bHiUaHC2nHztevkxg5_FBSzHddNeSsBayWUA@mail.gmail.com>
On 4/20/21 12:07 AM, Arnd Bergmann wrote:
> On Tue, Apr 20, 2021 at 5:10 AM Matthew Wilcox <willy@infradead.org> wrote:
>> On Tue, Apr 20, 2021 at 02:48:17AM +0000, Vineet Gupta wrote:
>>>> 32-bit architectures which expect 8-byte alignment for 8-byte integers
>>>> and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
>>>> page inadvertently expanded in 2019.
>>> FWIW, ARC doesn't require 8 byte alignment for 8 byte integers. This is
>>> only needed for 8-byte atomics due to the requirements of LLOCKD/SCOND
>>> instructions.
>> Ah, like x86? OK, great, I'll drop your arch from the list of
>> affected. Thanks!
> I mistakenly assumed that i386 and m68k were the only supported
> architectures with 32-bit alignment on u64. I checked it now and found
>
> $ for i in /home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/*-gcc ; do
> echo `echo 'int a = __alignof__(long long);' | $i -xc - -Wall -S -o- |
> grep -A1 a: | tail -n 1 | cut -f 3 -d\ `
> ${i#/home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/} ; done
> 8 aarch64-linux-gcc
> 8 alpha-linux-gcc
> 4 arc-linux-gcc
> 8 arm-linux-gnueabi-gcc
> 8 c6x-elf-gcc
> 4 csky-linux-gcc
> 4 h8300-linux-gcc
> 8 hppa-linux-gcc
> 8 hppa64-linux-gcc
> 8 i386-linux-gcc
> 8 ia64-linux-gcc
> 2 m68k-linux-gcc
> 4 microblaze-linux-gcc
> 8 mips-linux-gcc
> 8 mips64-linux-gcc
> 8 nds32le-linux-gcc
> 4 nios2-linux-gcc
> 4 or1k-linux-gcc
> 8 powerpc-linux-gcc
> 8 powerpc64-linux-gcc
> 8 riscv32-linux-gcc
> 8 riscv64-linux-gcc
> 8 s390-linux-gcc
> 4 sh2-linux-gcc
> 4 sh4-linux-gcc
> 8 sparc-linux-gcc
> 8 sparc64-linux-gcc
> 8 x86_64-linux-gcc
> 8 xtensa-linux-gcc
>
> which means that half the 32-bit architectures do this. This may
> cause more problems when arc and/or microblaze want to support
> 64-bit kernels and compat mode in the future on their latest hardware,
> as that means duplicating the x86 specific hacks we have for compat.
>
> What is alignof(u64) on 64-bit arc?
$ echo 'int a = __alignof__(long long);' | arc64-linux-gnu-gcc -xc -
-Wall -S -o - | grep -A1 a: | tail -n 1 | cut -f 3
8
Yeah ARCv2 alignment of 4 for 64-bit data was a bit of surprise finding
for me as well. When 64-bit load/stores were initially targeted by the
internal Metaware compiler (llvm based) they decided to keep alignment
to 4 still (granted hardware allowed this) and then gcc guys decided to
follow the same ABI. I only found this by accident :-)
Can you point me to some specifics on the compat issue. For better of
worse, arc64 does''t have a compat 32-bit mode, so everything is
64-on-64 or 32-on-32 (ARC32 flavor of ARCv3)
Thx,
-Vineet
WARNING: multiple messages have this Message-ID (diff)
From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Arnd Bergmann <arnd@kernel.org>, Matthew Wilcox <willy@infradead.org>
Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com>,
"grygorii.strashko@ti.com" <grygorii.strashko@ti.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
"mhocko@kernel.org" <mhocko@kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"mgorman@suse.de" <mgorman@suse.de>,
"brouer@redhat.com" <brouer@redhat.com>,
"mcroce@linux.microsoft.com" <mcroce@linux.microsoft.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"hch@lst.de" <hch@lst.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] mm: Fix struct page layout on 32-bit systems
Date: Tue, 20 Apr 2021 21:14:12 +0000 [thread overview]
Message-ID: <8d0fce1c-be7c-1c9b-bf5c-0c531db496ac@synopsys.com> (raw)
In-Reply-To: <CAK8P3a0KUwf1Z0bHiUaHC2nHztevkxg5_FBSzHddNeSsBayWUA@mail.gmail.com>
On 4/20/21 12:07 AM, Arnd Bergmann wrote:
> On Tue, Apr 20, 2021 at 5:10 AM Matthew Wilcox <willy@infradead.org> wrote:
>> On Tue, Apr 20, 2021 at 02:48:17AM +0000, Vineet Gupta wrote:
>>>> 32-bit architectures which expect 8-byte alignment for 8-byte integers
>>>> and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
>>>> page inadvertently expanded in 2019.
>>> FWIW, ARC doesn't require 8 byte alignment for 8 byte integers. This is
>>> only needed for 8-byte atomics due to the requirements of LLOCKD/SCOND
>>> instructions.
>> Ah, like x86? OK, great, I'll drop your arch from the list of
>> affected. Thanks!
> I mistakenly assumed that i386 and m68k were the only supported
> architectures with 32-bit alignment on u64. I checked it now and found
>
> $ for i in /home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/*-gcc ; do
> echo `echo 'int a = __alignof__(long long);' | $i -xc - -Wall -S -o- |
> grep -A1 a: | tail -n 1 | cut -f 3 -d\ `
> ${i#/home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/} ; done
> 8 aarch64-linux-gcc
> 8 alpha-linux-gcc
> 4 arc-linux-gcc
> 8 arm-linux-gnueabi-gcc
> 8 c6x-elf-gcc
> 4 csky-linux-gcc
> 4 h8300-linux-gcc
> 8 hppa-linux-gcc
> 8 hppa64-linux-gcc
> 8 i386-linux-gcc
> 8 ia64-linux-gcc
> 2 m68k-linux-gcc
> 4 microblaze-linux-gcc
> 8 mips-linux-gcc
> 8 mips64-linux-gcc
> 8 nds32le-linux-gcc
> 4 nios2-linux-gcc
> 4 or1k-linux-gcc
> 8 powerpc-linux-gcc
> 8 powerpc64-linux-gcc
> 8 riscv32-linux-gcc
> 8 riscv64-linux-gcc
> 8 s390-linux-gcc
> 4 sh2-linux-gcc
> 4 sh4-linux-gcc
> 8 sparc-linux-gcc
> 8 sparc64-linux-gcc
> 8 x86_64-linux-gcc
> 8 xtensa-linux-gcc
>
> which means that half the 32-bit architectures do this. This may
> cause more problems when arc and/or microblaze want to support
> 64-bit kernels and compat mode in the future on their latest hardware,
> as that means duplicating the x86 specific hacks we have for compat.
>
> What is alignof(u64) on 64-bit arc?
$ echo 'int a = __alignof__(long long);' | arc64-linux-gnu-gcc -xc -
-Wall -S -o - | grep -A1 a: | tail -n 1 | cut -f 3
8
Yeah ARCv2 alignment of 4 for 64-bit data was a bit of surprise finding
for me as well. When 64-bit load/stores were initially targeted by the
internal Metaware compiler (llvm based) they decided to keep alignment
to 4 still (granted hardware allowed this) and then gcc guys decided to
follow the same ABI. I only found this by accident :-)
Can you point me to some specifics on the compat issue. For better of
worse, arc64 does''t have a compat 32-bit mode, so everything is
64-on-64 or 32-on-32 (ARC32 flavor of ARCv3)
Thx,
-Vineet
_______________________________________________
linux-snps-arc mailing list
linux-snps-arc@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-snps-arc
WARNING: multiple messages have this Message-ID (diff)
From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Arnd Bergmann <arnd@kernel.org>, Matthew Wilcox <willy@infradead.org>
Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com>,
"grygorii.strashko@ti.com" <grygorii.strashko@ti.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
"mhocko@kernel.org" <mhocko@kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"mgorman@suse.de" <mgorman@suse.de>,
"brouer@redhat.com" <brouer@redhat.com>,
"mcroce@linux.microsoft.com" <mcroce@linux.microsoft.com>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"hch@lst.de" <hch@lst.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] mm: Fix struct page layout on 32-bit systems
Date: Tue, 20 Apr 2021 21:14:12 +0000 [thread overview]
Message-ID: <8d0fce1c-be7c-1c9b-bf5c-0c531db496ac@synopsys.com> (raw)
In-Reply-To: <CAK8P3a0KUwf1Z0bHiUaHC2nHztevkxg5_FBSzHddNeSsBayWUA@mail.gmail.com>
On 4/20/21 12:07 AM, Arnd Bergmann wrote:
> On Tue, Apr 20, 2021 at 5:10 AM Matthew Wilcox <willy@infradead.org> wrote:
>> On Tue, Apr 20, 2021 at 02:48:17AM +0000, Vineet Gupta wrote:
>>>> 32-bit architectures which expect 8-byte alignment for 8-byte integers
>>>> and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
>>>> page inadvertently expanded in 2019.
>>> FWIW, ARC doesn't require 8 byte alignment for 8 byte integers. This is
>>> only needed for 8-byte atomics due to the requirements of LLOCKD/SCOND
>>> instructions.
>> Ah, like x86? OK, great, I'll drop your arch from the list of
>> affected. Thanks!
> I mistakenly assumed that i386 and m68k were the only supported
> architectures with 32-bit alignment on u64. I checked it now and found
>
> $ for i in /home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/*-gcc ; do
> echo `echo 'int a = __alignof__(long long);' | $i -xc - -Wall -S -o- |
> grep -A1 a: | tail -n 1 | cut -f 3 -d\ `
> ${i#/home/arnd/cross/x86_64/gcc-10.1.0-nolibc/*/bin/} ; done
> 8 aarch64-linux-gcc
> 8 alpha-linux-gcc
> 4 arc-linux-gcc
> 8 arm-linux-gnueabi-gcc
> 8 c6x-elf-gcc
> 4 csky-linux-gcc
> 4 h8300-linux-gcc
> 8 hppa-linux-gcc
> 8 hppa64-linux-gcc
> 8 i386-linux-gcc
> 8 ia64-linux-gcc
> 2 m68k-linux-gcc
> 4 microblaze-linux-gcc
> 8 mips-linux-gcc
> 8 mips64-linux-gcc
> 8 nds32le-linux-gcc
> 4 nios2-linux-gcc
> 4 or1k-linux-gcc
> 8 powerpc-linux-gcc
> 8 powerpc64-linux-gcc
> 8 riscv32-linux-gcc
> 8 riscv64-linux-gcc
> 8 s390-linux-gcc
> 4 sh2-linux-gcc
> 4 sh4-linux-gcc
> 8 sparc-linux-gcc
> 8 sparc64-linux-gcc
> 8 x86_64-linux-gcc
> 8 xtensa-linux-gcc
>
> which means that half the 32-bit architectures do this. This may
> cause more problems when arc and/or microblaze want to support
> 64-bit kernels and compat mode in the future on their latest hardware,
> as that means duplicating the x86 specific hacks we have for compat.
>
> What is alignof(u64) on 64-bit arc?
$ echo 'int a = __alignof__(long long);' | arc64-linux-gnu-gcc -xc -
-Wall -S -o - | grep -A1 a: | tail -n 1 | cut -f 3
8
Yeah ARCv2 alignment of 4 for 64-bit data was a bit of surprise finding
for me as well. When 64-bit load/stores were initially targeted by the
internal Metaware compiler (llvm based) they decided to keep alignment
to 4 still (granted hardware allowed this) and then gcc guys decided to
follow the same ABI. I only found this by accident :-)
Can you point me to some specifics on the compat issue. For better of
worse, arc64 does''t have a compat 32-bit mode, so everything is
64-on-64 or 32-on-32 (ARC32 flavor of ARCv3)
Thx,
-Vineet
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-20 21:14 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 23:07 [PATCH 0/2] Change struct page layout for page_pool Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` [PATCH 1/2] mm: Fix struct page layout on 32-bit systems Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-17 1:08 ` kernel test robot
2021-04-17 1:08 ` kernel test robot
2021-04-17 1:08 ` kernel test robot
2021-04-17 1:08 ` kernel test robot
2021-04-17 2:45 ` Matthew Wilcox
2021-04-17 2:45 ` Matthew Wilcox
2021-04-17 2:45 ` Matthew Wilcox
2021-04-17 2:45 ` Matthew Wilcox
2021-04-17 18:32 ` Ilias Apalodimas
2021-04-17 18:32 ` Ilias Apalodimas
2021-04-17 18:32 ` Ilias Apalodimas
2021-04-17 18:32 ` Ilias Apalodimas
2021-04-17 20:22 ` Matthew Wilcox
2021-04-17 20:22 ` Matthew Wilcox
2021-04-17 20:22 ` Matthew Wilcox
2021-04-17 20:22 ` Matthew Wilcox
2021-04-18 11:21 ` Ilias Apalodimas
2021-04-18 11:21 ` Ilias Apalodimas
2021-04-18 11:21 ` Ilias Apalodimas
2021-04-18 11:21 ` Ilias Apalodimas
2021-04-17 21:18 ` David Laight
2021-04-17 21:18 ` David Laight
2021-04-17 21:18 ` David Laight
2021-04-17 21:18 ` David Laight
2021-04-17 21:18 ` David Laight
2021-04-17 22:45 ` Matthew Wilcox
2021-04-17 22:45 ` Matthew Wilcox
2021-04-17 22:45 ` Matthew Wilcox
2021-04-17 22:45 ` Matthew Wilcox
2021-04-17 22:45 ` Matthew Wilcox
2021-04-20 2:48 ` Vineet Gupta
2021-04-20 2:48 ` Vineet Gupta
2021-04-20 2:48 ` Vineet Gupta
2021-04-20 2:48 ` Vineet Gupta
2021-04-20 2:48 ` Vineet Gupta
2021-04-20 3:10 ` Matthew Wilcox
2021-04-20 3:10 ` Matthew Wilcox
2021-04-20 3:10 ` Matthew Wilcox
2021-04-20 3:10 ` Matthew Wilcox
2021-04-20 3:10 ` Matthew Wilcox
2021-04-20 7:07 ` Arnd Bergmann
2021-04-20 7:07 ` Arnd Bergmann
2021-04-20 7:07 ` Arnd Bergmann
2021-04-20 7:07 ` Arnd Bergmann
2021-04-20 7:07 ` Arnd Bergmann
2021-04-20 21:14 ` Vineet Gupta [this message]
2021-04-20 21:14 ` Vineet Gupta
2021-04-20 21:14 ` Vineet Gupta
2021-04-20 21:14 ` Vineet Gupta
2021-04-20 21:14 ` Vineet Gupta
2021-04-20 21:20 ` Arnd Bergmann
2021-04-20 21:20 ` Arnd Bergmann
2021-04-20 21:20 ` Arnd Bergmann
2021-04-20 21:20 ` Arnd Bergmann
2021-04-20 21:20 ` Arnd Bergmann
2021-04-21 5:50 ` hch
2021-04-21 5:50 ` hch
2021-04-21 5:50 ` hch
2021-04-21 5:50 ` hch
2021-04-21 5:50 ` hch
2021-04-21 8:43 ` David Laight
2021-04-21 8:43 ` David Laight
2021-04-21 8:43 ` David Laight
2021-04-21 8:43 ` David Laight
2021-04-21 8:43 ` David Laight
2021-04-21 8:58 ` Arnd Bergmann
2021-04-21 8:58 ` Arnd Bergmann
2021-04-21 8:58 ` Arnd Bergmann
2021-04-21 8:58 ` Arnd Bergmann
2021-04-21 8:58 ` Arnd Bergmann
2021-04-20 7:39 ` Geert Uytterhoeven
2021-04-20 7:39 ` Geert Uytterhoeven
2021-04-20 7:39 ` Geert Uytterhoeven
2021-04-20 7:39 ` Geert Uytterhoeven
2021-04-20 7:39 ` Geert Uytterhoeven
2021-04-20 8:39 ` David Laight
2021-04-20 8:39 ` David Laight
2021-04-20 8:39 ` David Laight
2021-04-20 8:39 ` David Laight
2021-04-20 11:32 ` Matthew Wilcox
2021-04-20 11:32 ` Matthew Wilcox
2021-04-20 11:32 ` Matthew Wilcox
2021-04-20 11:32 ` Matthew Wilcox
2021-04-17 7:34 ` Jesper Dangaard Brouer
2021-04-17 7:34 ` Jesper Dangaard Brouer
2021-04-17 7:34 ` Jesper Dangaard Brouer
2021-04-17 7:34 ` Jesper Dangaard Brouer
2021-04-20 7:21 ` Rasmus Villemoes
2021-04-20 7:21 ` Rasmus Villemoes
2021-04-20 7:21 ` Rasmus Villemoes
2021-04-20 7:21 ` Rasmus Villemoes
2021-04-16 23:07 ` [PATCH 2/2] mm: Indicate pfmemalloc pages in compound_head Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-16 23:07 ` Matthew Wilcox (Oracle)
2021-04-17 21:13 ` David Laight
2021-04-17 21:13 ` David Laight
2021-04-17 21:13 ` David Laight
2021-04-17 21:13 ` David Laight
2021-04-17 21:13 ` David Laight
2021-04-17 21:28 ` Matthew Wilcox
2021-04-17 21:28 ` Matthew Wilcox
2021-04-17 21:28 ` Matthew Wilcox
2021-04-17 21:28 ` Matthew Wilcox
2021-04-17 21:28 ` Matthew Wilcox
2021-04-20 4:03 ` [PATCH 0/2] Change struct page layout for page_pool Michael Ellerman
2021-04-20 4:03 ` Michael Ellerman
2021-04-20 4:03 ` Michael Ellerman
2021-04-20 4:03 ` Michael Ellerman
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