Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR

From: Ravi Bangoria <ravi.bangoria@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org, jolsa@kernel.org, namhyung@kernel.org,
	eranian@google.com, irogers@google.com, jmario@redhat.com,
	leo.yan@linaro.org, alisaidi@amazon.com, ak@linux.intel.com,
	kan.liang@linux.intel.com, dave.hansen@linux.intel.com,
	hpa@zytor.com, mingo@redhat.com, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, tglx@linutronix.de,
	bp@alien8.de, x86@kernel.org, linux-perf-users@vger.kernel.org,
	linux-kernel@vger.kernel.org, sandipan.das@amd.com,
	ananth.narayan@amd.com, kim.phillips@amd.com,
	santosh.shukla@amd.com, Ravi Bangoria <ravi.bangoria@amd.com>
Subject: Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR
Date: Thu, 26 May 2022 16:29:22 +0530	[thread overview]
Message-ID: <91e7651e-6937-ab20-2b1c-01f8be7933e1@amd.com> (raw)
In-Reply-To: <20220526095633.GO2578@worktop.programming.kicks-ass.net>

On 26-May-22 3:26 PM, Peter Zijlstra wrote:
> On Thu, May 26, 2022 at 02:16:28PM +0530, Ravi Bangoria wrote:
>> On 25-May-22 4:51 PM, Peter Zijlstra wrote:
>>> On Wed, May 25, 2022 at 03:09:31PM +0530, Ravi Bangoria wrote:
>>>> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
>>>> store operation. Populate perf sample physical address using it.
>>>>
>>>> Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
>>>> ---
>>>>  arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
>>>>  1 file changed, 25 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
>>>> index b57736357e25..c719020c0e83 100644
>>>> --- a/arch/x86/events/amd/ibs.c
>>>> +++ b/arch/x86/events/amd/ibs.c
>>>> @@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
>>>>  	data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
>>>>  }
>>>>  
>>>> +static void perf_ibs_get_phy_addr(struct perf_event *event,
>>>> +				  struct perf_ibs_data *ibs_data,
>>>> +				  struct perf_sample_data *data)
>>>> +{
>>>> +	union perf_mem_data_src *data_src = &data->data_src;
>>>> +	u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
>>>> +	u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
>>>> +
>>>> +	if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
>>>> +		perf_ibs_get_mem_op(op_data3, data);
>>>> +
>>>> +	if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
>>>> +	    data_src->mem_op != PERF_MEM_OP_STORE) ||
>>>> +	    !phy_addr_valid) {
>>>> +		data->phys_addr = 0x0;
>>>> +		return;
>>>> +	}
>>>> +
>>>> +	data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
>>>> +}
>>>
>>> perf_prepare_sample() will unconditionally overwrite data->phys_addr.
>>> There is currently no facility to let the driver set this field.
>>
>> Thanks for pointing it Peter. Would you mind if I add:
> 
> I think it's best if you extend/mimic the __PERF_SAMPLE_CALLCHAIN_EARLY
> hack. It's more or less the same problem and then at least the solution
> is consistent.

I've one more identical optimization in my list. IBS_OP_DATA3[IbsDcPgSz]
can provide PERF_SAMPLE_DATA_PAGE_SIZE. I hope consuming two more bits
for internal purpose is okay.

Thanks,
Ravi