From: Baolin Wang <baolin.wang@linaro.org> To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net Cc: baolin.wang@linaro.org, vincent.guittot@linaro.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 7/9] dt-bindings: mmc: sprd: Add PHY DLL delay documentation Date: Mon, 20 May 2019 18:12:00 +0800 [thread overview] Message-ID: <96f4304c001c0cf81ecc6bec69665d239203b9b7.1558346019.git.baolin.wang@linaro.org> (raw) In-Reply-To: <cover.1558346019.git.baolin.wang@linaro.org> In-Reply-To: <cover.1558346019.git.baolin.wang@linaro.org> Introduce some PHY DLL delays properties to help to sample the PHY clock. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index a285c77..e675397 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -20,6 +20,23 @@ Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +PHY DLL delays are used to delay the data valid window, and align the window +to sampling clock. PHY DLL delays can be configured by following properties, +and each property contains 4 cells which are used to configure the clock data +write line delay value, clock read command line delay value, clock read data +positive edge delay value and clock read data negative edge delay value. +Each cell's delay value unit is cycle of the PHY clock. + +- sprd,phy-delay-legacy: Delay value for legacy timing. +- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing. +- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing. +- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing. +- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing. +- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing. +- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing. + Examples: sdio0: sdio@20600000 { @@ -33,6 +50,7 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable; no-sdio; -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Baolin Wang <baolin.wang@linaro.org> To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net Cc: devicetree@vger.kernel.org, vincent.guittot@linaro.org, baolin.wang@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 7/9] dt-bindings: mmc: sprd: Add PHY DLL delay documentation Date: Mon, 20 May 2019 18:12:00 +0800 [thread overview] Message-ID: <96f4304c001c0cf81ecc6bec69665d239203b9b7.1558346019.git.baolin.wang@linaro.org> (raw) In-Reply-To: <cover.1558346019.git.baolin.wang@linaro.org> In-Reply-To: <cover.1558346019.git.baolin.wang@linaro.org> Introduce some PHY DLL delays properties to help to sample the PHY clock. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index a285c77..e675397 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -20,6 +20,23 @@ Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +PHY DLL delays are used to delay the data valid window, and align the window +to sampling clock. PHY DLL delays can be configured by following properties, +and each property contains 4 cells which are used to configure the clock data +write line delay value, clock read command line delay value, clock read data +positive edge delay value and clock read data negative edge delay value. +Each cell's delay value unit is cycle of the PHY clock. + +- sprd,phy-delay-legacy: Delay value for legacy timing. +- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing. +- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing. +- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing. +- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing. +- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing. +- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing. + Examples: sdio0: sdio@20600000 { @@ -33,6 +50,7 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable; no-sdio; -- 1.7.9.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-05-20 10:13 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-05-20 10:11 [PATCH 0/9] Add SD host controller support for SC9860 platform Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-05-20 10:11 ` [PATCH 1/9] mmc: sdhci-sprd: Check the enable clock's return value correctly Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 12:09 ` Adrian Hunter 2019-06-03 12:09 ` Adrian Hunter 2019-05-20 10:11 ` [PATCH 2/9] dt-bindings: mmc: sprd: Add another optional clock documentation Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 13:34 ` Ulf Hansson 2019-06-03 13:34 ` Ulf Hansson 2019-06-04 2:33 ` Baolin Wang 2019-06-04 2:33 ` Baolin Wang 2019-06-04 6:52 ` Ulf Hansson 2019-06-04 6:52 ` Ulf Hansson 2019-05-20 10:11 ` [PATCH 3/9] mmc: sdhci-sprd: Add optional gate clock support Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 12:20 ` Adrian Hunter 2019-06-03 12:20 ` Adrian Hunter 2019-05-20 10:11 ` [PATCH 4/9] mmc: sdhci-sprd: Implement the get_max_timeout_count() interface Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 12:34 ` Adrian Hunter 2019-06-03 12:34 ` Adrian Hunter 2019-06-04 8:03 ` Baolin Wang 2019-06-04 8:03 ` Baolin Wang 2019-05-20 10:11 ` [PATCH 5/9] mmc: sdhci-sprd: Add HS400 enhanced strobe mode Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 12:39 ` Adrian Hunter 2019-06-03 12:39 ` Adrian Hunter 2019-05-20 10:11 ` [PATCH 6/9] mmc: sdhci-sprd: Enable PHY DLL to make clock stable Baolin Wang 2019-05-20 10:11 ` Baolin Wang 2019-06-03 12:40 ` Adrian Hunter 2019-06-03 12:40 ` Adrian Hunter 2019-05-20 10:12 ` Baolin Wang [this message] 2019-05-20 10:12 ` [PATCH 7/9] dt-bindings: mmc: sprd: Add PHY DLL delay documentation Baolin Wang 2019-05-20 10:12 ` [PATCH 8/9] mmc: sdhci-sprd: Add PHY DLL delay configuration Baolin Wang 2019-05-20 10:12 ` Baolin Wang 2019-06-03 13:01 ` Adrian Hunter 2019-06-03 13:01 ` Adrian Hunter 2019-06-04 2:18 ` Baolin Wang 2019-06-04 2:18 ` Baolin Wang 2019-05-20 10:12 ` [PATCH 9/9] arm64: dts: sprd: Add Spreadtrum SD host controller support Baolin Wang 2019-05-20 10:12 ` Baolin Wang 2019-06-03 8:41 ` [PATCH 0/9] Add SD host controller support for SC9860 platform Baolin Wang 2019-06-03 8:41 ` Baolin Wang 2019-06-04 7:13 ` Ulf Hansson 2019-06-04 7:13 ` Ulf Hansson 2019-06-04 7:21 ` Baolin Wang 2019-06-04 7:21 ` Baolin Wang
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