From: Nishanth Menon <nm@ti.com>
To: Tony Lindgren <tony@atomide.com>, linux-omap@vger.kernel.org
Cc: Tero Kristo <t-kristo@ti.com>,
Santosh Shilimkar <santosh.shilimkar@oracle.com>,
linux-arm-kernel@lists.infradead.org,
Dave Gerlach <d-gerlach@ti.com>
Subject: Re: [PATCH 2/3] ARM: OMAP5: Add cpuidle assembly code
Date: Thu, 17 Aug 2017 20:38:44 -0500 [thread overview]
Message-ID: <97a05a99-3fc5-7fb8-f6d0-708c5d0ddcdc@ti.com> (raw)
In-Reply-To: <20170817230122.30655-3-tony@atomide.com>
On 08/17/2017 06:01 PM, Tony Lindgren wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
>
> In order to support CPU off modes during idle like omap4 already
> does, we need to add the assembly code needed for restoring the
> CPU state from off mode.
>
> The code is a combination of the following earlier patches done
> by Santosh Shilimkar <santosh.shilimkar@oracle.com> in TI Linux
> kernel tree:
>
> 881603c3f97f ("ARM: OMAP5: PM: Add CPU power off mode support")
> 411533444365 ("ARM: OMAP5: PM: Add MPU Open Switch Retention support")
> 3f9ea63594c3 ("ARM: OMAP5: PM: Add L2 memory power down support")
Ref:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9f5dc91b691cf296c49aedf0a671fd659a70f737
and the fact that OSWR and OFF both have been descoped in production
silicon, is again the reason why TI has not posted these preproduction
experimentation patches upstream.
NAK once again. Sorry.
PS: deleting Santosh's old TI ID which should unfortunately be
bouncing now.
--
Regards,
Nishanth Menon
WARNING: multiple messages have this Message-ID (diff)
From: nm@ti.com (Nishanth Menon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: OMAP5: Add cpuidle assembly code
Date: Thu, 17 Aug 2017 20:38:44 -0500 [thread overview]
Message-ID: <97a05a99-3fc5-7fb8-f6d0-708c5d0ddcdc@ti.com> (raw)
In-Reply-To: <20170817230122.30655-3-tony@atomide.com>
On 08/17/2017 06:01 PM, Tony Lindgren wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
>
> In order to support CPU off modes during idle like omap4 already
> does, we need to add the assembly code needed for restoring the
> CPU state from off mode.
>
> The code is a combination of the following earlier patches done
> by Santosh Shilimkar <santosh.shilimkar@oracle.com> in TI Linux
> kernel tree:
>
> 881603c3f97f ("ARM: OMAP5: PM: Add CPU power off mode support")
> 411533444365 ("ARM: OMAP5: PM: Add MPU Open Switch Retention support")
> 3f9ea63594c3 ("ARM: OMAP5: PM: Add L2 memory power down support")
Ref:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9f5dc91b691cf296c49aedf0a671fd659a70f737
and the fact that OSWR and OFF both have been descoped in production
silicon, is again the reason why TI has not posted these preproduction
experimentation patches upstream.
NAK once again. Sorry.
PS: deleting Santosh's old TI ID which should unfortunately be
bouncing now.
--
Regards,
Nishanth Menon
next prev parent reply other threads:[~2017-08-18 1:38 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-17 23:01 [PATCH 0/3] omap5 cpu off mode support Tony Lindgren
2017-08-17 23:01 ` Tony Lindgren
2017-08-17 23:01 ` [PATCH 1/3] ARM: OMAP2+: Separate dra7 cpuidle from omap5 Tony Lindgren
2017-08-17 23:01 ` Tony Lindgren
2017-08-17 23:42 ` Tony Lindgren
2017-08-17 23:42 ` Tony Lindgren
2017-08-17 23:01 ` [PATCH 2/3] ARM: OMAP5: Add cpuidle assembly code Tony Lindgren
2017-08-17 23:01 ` Tony Lindgren
2017-08-18 1:38 ` Nishanth Menon [this message]
2017-08-18 1:38 ` Nishanth Menon
2017-08-17 23:01 ` [PATCH 3/3] ARM: OMAP5: Enable CPU off idle states Tony Lindgren
2017-08-17 23:01 ` Tony Lindgren
2017-08-18 1:29 ` Nishanth Menon
2017-08-18 1:29 ` Nishanth Menon
2017-08-18 15:26 ` Tony Lindgren
2017-08-18 15:26 ` Tony Lindgren
2017-08-18 22:27 ` Nishanth Menon
2017-08-18 22:27 ` Nishanth Menon
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