All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ezequiel Garcia <ezequiel@collabora.com>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Philipp Zabel <pza@pengutronix.de>
Cc: mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, festevam@gmail.com, lee.jones@linaro.org,
	gregkh@linuxfoundation.org, mripard@kernel.org,
	paul.kocialkowski@bootlin.com, wens@csie.org,
	jernej.skrabec@siol.net, hverkuil-cisco@xs4all.nl,
	emil.l.velikov@gmail.com, kernel@pengutronix.de,
	linux-imx@nxp.com, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
	kernel@collabora.com
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware
Date: Fri, 26 Mar 2021 12:28:25 -0300	[thread overview]
Message-ID: <986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com> (raw)
In-Reply-To: <4df3c9e4-0983-6007-f3b3-323882f903cf@collabora.com>

On Fri, 2021-03-26 at 15:33 +0100, Benjamin Gaignard wrote:
> 
> Le 26/03/2021 à 15:24, Philipp Zabel a écrit :
> > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> > > Split VPU node in two: one for G1 and one for G2 since they are
> > > different hardware blocks.
> > > Add syscon for hardware control block.
> > > Remove reg-names property that is useless.
> > > Each VPU node only need one interrupt.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > > ---
> > > version 5:
> > >   - use syscon instead of VPU reset
> > > 
> > >   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
> > >   1 file changed, 34 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > index 17c449e12c2e..b537d153ebbd 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 {
> > >                         status = "disabled";
> > >                 };
> > >   
> > > -               vpu: video-codec@38300000 {
> > > +               vpu_ctrl: syscon@38320000 {
> > > +                       compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> > > +                       reg = <0x38320000 0x10000>;
> > > +               };
> > > +
> > > +               vpu_g1: video-codec@38300000 {
> > >                         compatible = "nxp,imx8mq-vpu";
> > > -                       reg = <0x38300000 0x10000>,
> > > -                             <0x38310000 0x10000>,
> > > -                             <0x38320000 0x10000>;
> > > -                       reg-names = "g1", "g2", "ctrl";
> > > -                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > > -                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > -                       interrupt-names = "g1", "g2";
> > > +                       reg = <0x38300000 0x10000>;
> > > +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g1";
> > >                         clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 {
> > >                                                  <&clk IMX8MQ_VPU_PLL_OUT>,
> > >                                                  <&clk IMX8MQ_SYS1_PLL_800M>,
> > >                                                  <&clk IMX8MQ_VPU_PLL>;
> > > -                       assigned-clock-rates = <600000000>, <600000000>,
> > > +                       assigned-clock-rates = <600000000>, <300000000>,
> > I'd like to see this mentioned in the commit message.
> 
> Yes I would do that.
> The value comes from the datasheet.
> 
> > 
> > > +                                              <800000000>, <0>;
> > > +                       power-domains = <&pgc_vpu>;
> > > +                       nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> > > +               };
> > > +
> > > +               vpu_g2: video-codec@38310000 {
> > > +                       compatible = "nxp,imx8mq-vpu-g2";
> > > +                       reg = <0x38310000 0x10000>;
> > > +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g2";
> > > +                       clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > +                       clock-names = "g1", "g2",  "bus";
> > > +                       assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
> > Can the G1 clock configuration be dropped from the G2 device node and
> > the G2 clock configuration from the G1 device node? It looks weird that
> > these devices configure each other's clocks.
> 
> No because if only one device node is enabled we need to configure the both
> clocks anyway.
> 

Since this is akward, how about adding a comment here in the dtsi to clarify it?

Thanks,
Ezequiel


WARNING: multiple messages have this Message-ID (diff)
From: Ezequiel Garcia <ezequiel@collabora.com>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Philipp Zabel <pza@pengutronix.de>
Cc: kernel@collabora.com, lee.jones@linaro.org,
	devel@driverdev.osuosl.org, linux-rockchip@lists.infradead.org,
	wens@csie.org, linux-imx@nxp.com, linux-media@vger.kernel.org,
	devicetree@vger.kernel.org, s.hauer@pengutronix.de,
	mripard@kernel.org, robh+dt@kernel.org, mchehab@kernel.org,
	linux-arm-kernel@lists.infradead.org, jernej.skrabec@siol.net,
	gregkh@linuxfoundation.org, emil.l.velikov@gmail.com,
	linux-kernel@vger.kernel.org, paul.kocialkowski@bootlin.com,
	kernel@pengutronix.de, hverkuil-cisco@xs4all.nl,
	shawnguo@kernel.org
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware
Date: Fri, 26 Mar 2021 12:28:25 -0300	[thread overview]
Message-ID: <986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com> (raw)
In-Reply-To: <4df3c9e4-0983-6007-f3b3-323882f903cf@collabora.com>

On Fri, 2021-03-26 at 15:33 +0100, Benjamin Gaignard wrote:
> 
> Le 26/03/2021 à 15:24, Philipp Zabel a écrit :
> > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> > > Split VPU node in two: one for G1 and one for G2 since they are
> > > different hardware blocks.
> > > Add syscon for hardware control block.
> > > Remove reg-names property that is useless.
> > > Each VPU node only need one interrupt.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > > ---
> > > version 5:
> > >   - use syscon instead of VPU reset
> > > 
> > >   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
> > >   1 file changed, 34 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > index 17c449e12c2e..b537d153ebbd 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 {
> > >                         status = "disabled";
> > >                 };
> > >   
> > > -               vpu: video-codec@38300000 {
> > > +               vpu_ctrl: syscon@38320000 {
> > > +                       compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> > > +                       reg = <0x38320000 0x10000>;
> > > +               };
> > > +
> > > +               vpu_g1: video-codec@38300000 {
> > >                         compatible = "nxp,imx8mq-vpu";
> > > -                       reg = <0x38300000 0x10000>,
> > > -                             <0x38310000 0x10000>,
> > > -                             <0x38320000 0x10000>;
> > > -                       reg-names = "g1", "g2", "ctrl";
> > > -                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > > -                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > -                       interrupt-names = "g1", "g2";
> > > +                       reg = <0x38300000 0x10000>;
> > > +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g1";
> > >                         clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 {
> > >                                                  <&clk IMX8MQ_VPU_PLL_OUT>,
> > >                                                  <&clk IMX8MQ_SYS1_PLL_800M>,
> > >                                                  <&clk IMX8MQ_VPU_PLL>;
> > > -                       assigned-clock-rates = <600000000>, <600000000>,
> > > +                       assigned-clock-rates = <600000000>, <300000000>,
> > I'd like to see this mentioned in the commit message.
> 
> Yes I would do that.
> The value comes from the datasheet.
> 
> > 
> > > +                                              <800000000>, <0>;
> > > +                       power-domains = <&pgc_vpu>;
> > > +                       nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> > > +               };
> > > +
> > > +               vpu_g2: video-codec@38310000 {
> > > +                       compatible = "nxp,imx8mq-vpu-g2";
> > > +                       reg = <0x38310000 0x10000>;
> > > +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g2";
> > > +                       clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > +                       clock-names = "g1", "g2",  "bus";
> > > +                       assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
> > Can the G1 clock configuration be dropped from the G2 device node and
> > the G2 clock configuration from the G1 device node? It looks weird that
> > these devices configure each other's clocks.
> 
> No because if only one device node is enabled we need to configure the both
> clocks anyway.
> 

Since this is akward, how about adding a comment here in the dtsi to clarify it?

Thanks,
Ezequiel

_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

WARNING: multiple messages have this Message-ID (diff)
From: Ezequiel Garcia <ezequiel@collabora.com>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Philipp Zabel <pza@pengutronix.de>
Cc: mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
	 s.hauer@pengutronix.de, festevam@gmail.com,
	lee.jones@linaro.org,  gregkh@linuxfoundation.org,
	mripard@kernel.org, paul.kocialkowski@bootlin.com,
	 wens@csie.org, jernej.skrabec@siol.net,
	hverkuil-cisco@xs4all.nl,  emil.l.velikov@gmail.com,
	kernel@pengutronix.de, linux-imx@nxp.com,
	 linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	 devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
	kernel@collabora.com
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware
Date: Fri, 26 Mar 2021 12:28:25 -0300	[thread overview]
Message-ID: <986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com> (raw)
In-Reply-To: <4df3c9e4-0983-6007-f3b3-323882f903cf@collabora.com>

On Fri, 2021-03-26 at 15:33 +0100, Benjamin Gaignard wrote:
> 
> Le 26/03/2021 à 15:24, Philipp Zabel a écrit :
> > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> > > Split VPU node in two: one for G1 and one for G2 since they are
> > > different hardware blocks.
> > > Add syscon for hardware control block.
> > > Remove reg-names property that is useless.
> > > Each VPU node only need one interrupt.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > > ---
> > > version 5:
> > >   - use syscon instead of VPU reset
> > > 
> > >   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
> > >   1 file changed, 34 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > index 17c449e12c2e..b537d153ebbd 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 {
> > >                         status = "disabled";
> > >                 };
> > >   
> > > -               vpu: video-codec@38300000 {
> > > +               vpu_ctrl: syscon@38320000 {
> > > +                       compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> > > +                       reg = <0x38320000 0x10000>;
> > > +               };
> > > +
> > > +               vpu_g1: video-codec@38300000 {
> > >                         compatible = "nxp,imx8mq-vpu";
> > > -                       reg = <0x38300000 0x10000>,
> > > -                             <0x38310000 0x10000>,
> > > -                             <0x38320000 0x10000>;
> > > -                       reg-names = "g1", "g2", "ctrl";
> > > -                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > > -                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > -                       interrupt-names = "g1", "g2";
> > > +                       reg = <0x38300000 0x10000>;
> > > +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g1";
> > >                         clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 {
> > >                                                  <&clk IMX8MQ_VPU_PLL_OUT>,
> > >                                                  <&clk IMX8MQ_SYS1_PLL_800M>,
> > >                                                  <&clk IMX8MQ_VPU_PLL>;
> > > -                       assigned-clock-rates = <600000000>, <600000000>,
> > > +                       assigned-clock-rates = <600000000>, <300000000>,
> > I'd like to see this mentioned in the commit message.
> 
> Yes I would do that.
> The value comes from the datasheet.
> 
> > 
> > > +                                              <800000000>, <0>;
> > > +                       power-domains = <&pgc_vpu>;
> > > +                       nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> > > +               };
> > > +
> > > +               vpu_g2: video-codec@38310000 {
> > > +                       compatible = "nxp,imx8mq-vpu-g2";
> > > +                       reg = <0x38310000 0x10000>;
> > > +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g2";
> > > +                       clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > +                       clock-names = "g1", "g2",  "bus";
> > > +                       assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
> > Can the G1 clock configuration be dropped from the G2 device node and
> > the G2 clock configuration from the G1 device node? It looks weird that
> > these devices configure each other's clocks.
> 
> No because if only one device node is enabled we need to configure the both
> clocks anyway.
> 

Since this is akward, how about adding a comment here in the dtsi to clarify it?

Thanks,
Ezequiel


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Ezequiel Garcia <ezequiel@collabora.com>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Philipp Zabel <pza@pengutronix.de>
Cc: mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
	 s.hauer@pengutronix.de, festevam@gmail.com,
	lee.jones@linaro.org,  gregkh@linuxfoundation.org,
	mripard@kernel.org, paul.kocialkowski@bootlin.com,
	 wens@csie.org, jernej.skrabec@siol.net,
	hverkuil-cisco@xs4all.nl,  emil.l.velikov@gmail.com,
	kernel@pengutronix.de, linux-imx@nxp.com,
	 linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	 devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
	kernel@collabora.com
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware
Date: Fri, 26 Mar 2021 12:28:25 -0300	[thread overview]
Message-ID: <986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com> (raw)
In-Reply-To: <4df3c9e4-0983-6007-f3b3-323882f903cf@collabora.com>

On Fri, 2021-03-26 at 15:33 +0100, Benjamin Gaignard wrote:
> 
> Le 26/03/2021 à 15:24, Philipp Zabel a écrit :
> > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> > > Split VPU node in two: one for G1 and one for G2 since they are
> > > different hardware blocks.
> > > Add syscon for hardware control block.
> > > Remove reg-names property that is useless.
> > > Each VPU node only need one interrupt.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > > ---
> > > version 5:
> > >   - use syscon instead of VPU reset
> > > 
> > >   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
> > >   1 file changed, 34 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > index 17c449e12c2e..b537d153ebbd 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > > @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 {
> > >                         status = "disabled";
> > >                 };
> > >   
> > > -               vpu: video-codec@38300000 {
> > > +               vpu_ctrl: syscon@38320000 {
> > > +                       compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> > > +                       reg = <0x38320000 0x10000>;
> > > +               };
> > > +
> > > +               vpu_g1: video-codec@38300000 {
> > >                         compatible = "nxp,imx8mq-vpu";
> > > -                       reg = <0x38300000 0x10000>,
> > > -                             <0x38310000 0x10000>,
> > > -                             <0x38320000 0x10000>;
> > > -                       reg-names = "g1", "g2", "ctrl";
> > > -                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > > -                                    <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > -                       interrupt-names = "g1", "g2";
> > > +                       reg = <0x38300000 0x10000>;
> > > +                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g1";
> > >                         clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > >                                  <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 {
> > >                                                  <&clk IMX8MQ_VPU_PLL_OUT>,
> > >                                                  <&clk IMX8MQ_SYS1_PLL_800M>,
> > >                                                  <&clk IMX8MQ_VPU_PLL>;
> > > -                       assigned-clock-rates = <600000000>, <600000000>,
> > > +                       assigned-clock-rates = <600000000>, <300000000>,
> > I'd like to see this mentioned in the commit message.
> 
> Yes I would do that.
> The value comes from the datasheet.
> 
> > 
> > > +                                              <800000000>, <0>;
> > > +                       power-domains = <&pgc_vpu>;
> > > +                       nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> > > +               };
> > > +
> > > +               vpu_g2: video-codec@38310000 {
> > > +                       compatible = "nxp,imx8mq-vpu-g2";
> > > +                       reg = <0x38310000 0x10000>;
> > > +                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       interrupt-names = "g2";
> > > +                       clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> > > +                                <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> > > +                       clock-names = "g1", "g2",  "bus";
> > > +                       assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,
> > Can the G1 clock configuration be dropped from the G2 device node and
> > the G2 clock configuration from the G1 device node? It looks weird that
> > these devices configure each other's clocks.
> 
> No because if only one device node is enabled we need to configure the both
> clocks anyway.
> 

Since this is akward, how about adding a comment here in the dtsi to clarify it?

Thanks,
Ezequiel


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-03-26 15:29 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-18  8:20 [PATCH v6 00/13] Add HANTRO G2/HEVC decoder support for IMX8MQ Benjamin Gaignard
2021-03-18  8:20 ` Benjamin Gaignard
2021-03-18  8:20 ` Benjamin Gaignard
2021-03-18  8:20 ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp,imx8mq-vpu-ctrl' to syscon list Benjamin Gaignard
2021-03-18  8:20   ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp, imx8mq-vpu-ctrl' " Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-23 22:33   ` Rob Herring
2021-03-23 22:33     ` Rob Herring
2021-03-23 22:33     ` Rob Herring
2021-03-23 22:33     ` Rob Herring
2021-03-18  8:20 ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support Benjamin Gaignard
2021-03-18  8:20   ` [PATCH v6 02/13] dt-bindings: media: nxp, imx8mq-vpu: " Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-23 22:35   ` Rob Herring
2021-03-23 22:35     ` Rob Herring
2021-03-23 22:35     ` Rob Herring
2021-03-23 22:35     ` Rob Herring
2021-03-26 14:11   ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: " Philipp Zabel
2021-03-26 14:11     ` Philipp Zabel
2021-03-26 14:11     ` Philipp Zabel
2021-03-26 14:11     ` Philipp Zabel
2021-03-26 14:26     ` Benjamin Gaignard
2021-03-26 14:26       ` Benjamin Gaignard
2021-03-26 14:26       ` Benjamin Gaignard
2021-03-26 14:26       ` Benjamin Gaignard
2021-03-26 14:37       ` Philipp Zabel
2021-03-26 14:37         ` Philipp Zabel
2021-03-26 14:37         ` Philipp Zabel
2021-03-26 14:37         ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 03/13] media: hantro: Use syscon instead of 'ctrl' register Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-26 14:13   ` Philipp Zabel
2021-03-26 14:13     ` Philipp Zabel
2021-03-26 14:13     ` Philipp Zabel
2021-03-26 14:13     ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 04/13] media: hevc: Add fields and flags for hevc PPS Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 05/13] media: hevc: Add decode params control Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 06/13] media: hantro: change hantro_codec_ops run prototype to return errors Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 07/13] media: hantro: Define HEVC codec profiles and supported features Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 08/13] media: hantro: Only use postproc when post processed formats are defined Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 09/13] media: uapi: Add a control for HANTRO driver Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 10/13] media: hantro: handle V4L2_PIX_FMT_HEVC_SLICE control Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 11/13] media: hantro: Introduce G2/HEVC decoder Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 12/13] media: hantro: IMX8M: add variant for G2/HEVC codec Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-26 14:18   ` Philipp Zabel
2021-03-26 14:18     ` Philipp Zabel
2021-03-26 14:18     ` Philipp Zabel
2021-03-26 14:18     ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-18  8:20   ` Benjamin Gaignard
2021-03-26 14:24   ` Philipp Zabel
2021-03-26 14:24     ` Philipp Zabel
2021-03-26 14:24     ` Philipp Zabel
2021-03-26 14:24     ` Philipp Zabel
2021-03-26 14:33     ` Benjamin Gaignard
2021-03-26 14:33       ` Benjamin Gaignard
2021-03-26 14:33       ` Benjamin Gaignard
2021-03-26 14:33       ` Benjamin Gaignard
2021-03-26 15:28       ` Ezequiel Garcia [this message]
2021-03-26 15:28         ` Ezequiel Garcia
2021-03-26 15:28         ` Ezequiel Garcia
2021-03-26 15:28         ` Ezequiel Garcia

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=986ee841d0c512a6f0ffe9dfa2e0803980b02aa0.camel@collabora.com \
    --to=ezequiel@collabora.com \
    --cc=benjamin.gaignard@collabora.com \
    --cc=devel@driverdev.osuosl.org \
    --cc=devicetree@vger.kernel.org \
    --cc=emil.l.velikov@gmail.com \
    --cc=festevam@gmail.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=hverkuil-cisco@xs4all.nl \
    --cc=jernej.skrabec@siol.net \
    --cc=kernel@collabora.com \
    --cc=kernel@pengutronix.de \
    --cc=lee.jones@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=mchehab@kernel.org \
    --cc=mripard@kernel.org \
    --cc=paul.kocialkowski@bootlin.com \
    --cc=pza@pengutronix.de \
    --cc=robh+dt@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    --cc=wens@csie.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.