From: Ran Wang <ran.wang_1@nxp.com>
To: Felipe Balbi <balbi@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch when boot
Date: Fri, 15 Feb 2019 08:39:19 +0000 [thread overview]
Message-ID: <AM5PR0402MB286587BA0B90A50FB0AC8A58F1600@AM5PR0402MB2865.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <201901162139.dkm3lJv5%fengguang.wu@intel.com>
Hi Felipe,
Sorry for the late response, I didn't receive your mail.
Felipe Balbi <balbi@kernel.org> wrotes:
>Hi,
>
>Ran Wang <ran.wang_1@nxp.com> writes:
>> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
>> +{
>> + int i, port_num;
>> + u32 reg, op_regs_base, offset;
>> + void __iomem *xhci_regs;
>> +
>> + /* xhci regs is not mapped yet, do it temperary here */
>> + if (dwc->xhci_resources[0].start) {
>> + xhci_regs = ioremap(dwc->xhci_resources[0].start,
>> + DWC3_XHCI_REGS_END);
>> + if (IS_ERR(xhci_regs)) {
>> + dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
>> + return;
>> + }
>> +
>> + op_regs_base = HC_LENGTH(readl(xhci_regs));
>> + reg = readl(xhci_regs + XHCI_HCSPARAMS1);
>> + port_num = HCS_MAX_PORTS(reg);
>> +
>> + for (i = 1; i <= port_num; i++) {
>> + offset = op_regs_base + XHCI_PORTSC_BASE + 0x10*(i-1);
>> + reg = readl(xhci_regs + offset);
>> + reg &= ~PORT_POWER;
>> + writel(reg, xhci_regs + offset);
>> + }
>> +
>> + iounmap(xhci_regs);
>
>why can't this be done during xhci_gen_setup()?
Actually I have done experiment like what you suggested (in xhci-plat.c), but the timing
seems too late--making VBUS waveform look like a square wave as below:
Here DWC3 enable host mode, VBUS on
|
+5V /---------\ 40ms /---------------------------....
0V ________/ 90ms \______/
| |
| Here do xhci reset, VBUS back to +5V again
Here set all PORTSC[PP] to 0 in xhci_gen_setup()
So I am afraid the solution might have to be added in DWC3 core driver where just after host mode enabling code if want fix this :(
Regards,
Ran
WARNING: multiple messages have this Message-ID (diff)
From: Ran Wang <ran.wang_1@nxp.com>
To: Felipe Balbi <balbi@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [2/2] usb: dwc3: Add workaround for host mode VBUS glitch when boot
Date: Fri, 15 Feb 2019 08:39:19 +0000 [thread overview]
Message-ID: <AM5PR0402MB286587BA0B90A50FB0AC8A58F1600@AM5PR0402MB2865.eurprd04.prod.outlook.com> (raw)
Hi Felipe,
Sorry for the late response, I didn't receive your mail.
Felipe Balbi <balbi@kernel.org> wrotes:
>Hi,
>
>Ran Wang <ran.wang_1@nxp.com> writes:
>> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
>> +{
>> + int i, port_num;
>> + u32 reg, op_regs_base, offset;
>> + void __iomem *xhci_regs;
>> +
>> + /* xhci regs is not mapped yet, do it temperary here */
>> + if (dwc->xhci_resources[0].start) {
>> + xhci_regs = ioremap(dwc->xhci_resources[0].start,
>> + DWC3_XHCI_REGS_END);
>> + if (IS_ERR(xhci_regs)) {
>> + dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
>> + return;
>> + }
>> +
>> + op_regs_base = HC_LENGTH(readl(xhci_regs));
>> + reg = readl(xhci_regs + XHCI_HCSPARAMS1);
>> + port_num = HCS_MAX_PORTS(reg);
>> +
>> + for (i = 1; i <= port_num; i++) {
>> + offset = op_regs_base + XHCI_PORTSC_BASE + 0x10*(i-1);
>> + reg = readl(xhci_regs + offset);
>> + reg &= ~PORT_POWER;
>> + writel(reg, xhci_regs + offset);
>> + }
>> +
>> + iounmap(xhci_regs);
>
>why can't this be done during xhci_gen_setup()?
Actually I have done experiment like what you suggested (in xhci-plat.c), but the timing
seems too late--making VBUS waveform look like a square wave as below:
Here DWC3 enable host mode, VBUS on
|
+5V /---------\ 40ms /---------------------------....
0V ________/ 90ms \______/
| |
| Here do xhci reset, VBUS back to +5V again
Here set all PORTSC[PP] to 0 in xhci_gen_setup()
So I am afraid the solution might have to be added in DWC3 core driver where just after host mode enabling code if want fix this :(
Regards,
Ran
next prev parent reply other threads:[~2019-02-15 8:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-16 6:48 [PATCH 0/2] usb: dwc3: Add avoiding vbus glitch happen during xhci reset Ran Wang
2019-01-16 6:48 ` [PATCH 1/2] " Ran Wang
2019-01-16 6:48 ` [1/2] " Ran Wang
2019-01-16 7:05 ` [PATCH 1/2] " Ran Wang
2019-01-16 7:05 ` [1/2] " Ran Wang
2019-01-22 1:03 ` [PATCH 1/2] " Rob Herring
2019-01-22 1:03 ` [1/2] " Rob Herring
2019-01-22 2:38 ` [PATCH 1/2] " Ran Wang
2019-01-22 2:38 ` [1/2] " Ran Wang
2019-01-22 2:38 ` [PATCH 1/2] " Ran Wang
2019-01-22 13:45 ` Rob Herring
2019-01-22 13:45 ` [1/2] " Rob Herring
2019-01-16 6:48 ` [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch when boot Ran Wang
2019-01-16 6:48 ` [2/2] " Ran Wang
2019-01-16 8:21 ` [PATCH 2/2] " Felipe Balbi
2019-01-16 8:21 ` [2/2] " Felipe Balbi
2019-01-16 8:21 ` [PATCH 2/2] " Felipe Balbi
2019-01-16 13:11 ` kbuild test robot
2019-01-16 13:11 ` [2/2] " kbuild test robot
2019-01-16 13:11 ` [PATCH 2/2] " kbuild test robot
2019-02-15 8:39 ` Ran Wang [this message]
2019-02-15 8:39 ` [2/2] " Ran Wang
2024-01-19 21:31 [PATCH 1/2] dt-bindings: usb: dwc3: Add snps,host-vbus-glitches avoiding vbus glitch Frank Li
2024-01-19 21:31 ` [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch when boot Frank Li
2024-01-20 0:51 ` Thinh Nguyen
2024-01-20 0:55 ` Thinh Nguyen
2024-01-20 2:00 ` Frank Li
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