From: Leo Li <leoyang.li@nxp.com> To: Pankaj Bansal <pankaj.bansal@nxp.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: "open list : OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [PATCH v4 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage Date: Wed, 6 Feb 2019 22:26:39 +0000 [thread overview] Message-ID: <AM6PR04MB5863F3BE0D7C560F3DFECD618F6F0@AM6PR04MB5863.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20190205153924.7204-2-pankaj.bansal@nxp.com> > -----Original Message----- > From: Pankaj Bansal > Sent: Tuesday, February 5, 2019 4:15 AM > To: Leo Li <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Mark > Rutland <mark.rutland@arm.com> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > open list : OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS > <devicetree@vger.kernel.org>; Pankaj Bansal <pankaj.bansal@nxp.com> > Subject: [PATCH v4 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage > > an FPGA-based system controller, called “Qixis”, which > manages several critical system features, including: > • Reset sequencing > • Power supply configuration > • Board configuration > • hardware configuration > > The qixis registers are accessible over one or more system-specific > interfaces, typically I2C, JTAG or an embedded processor. In theory the on-board FPGA is not part of the SoC. The Qixis device has been defined previously in Documentation/devicetree/bindings/board/fsl-board.txt file. Although normally board bindings are defined in architecture specific binding folders, this is a good place for board related stuff used across multiple architectures. You can update the existing binding if needed. > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > --- > > Notes: > V4: > - No Change > V3: > - Added boardname based compatible field in bindings > - Added bindings for MMIO based FPGA > V2: > - No change > > .../bindings/soc/fsl/qixis_ctrl.txt | 53 ++++++++++++++++++ > 1 file changed, 53 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > new file mode 100644 > index 000000000000..5d510df14be8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > @@ -0,0 +1,53 @@ > +* QIXIS FPGA block > + > +an FPGA-based system controller, called “Qixis”, which > +manages several critical system features, including: > +• Configuration switch monitoring > +• Power on/off sequencing > +• Reset sequencing > +• Power supply configuration > +• Board configuration > +• hardware configuration > +• Background power data collection (DCM) > +• Fault monitoring > +• RCW bypass SRAM (replace flash RCW with internal RCW) (NOR only) > +• Dedicated functional validation blocks (POSt/IRS, triggered event, and so > on) > +• I2C master for remote board control even with no DUT available > + > +The qixis registers are accessible over one or more system-specific > interfaces, > +typically I2C, JTAG or an embedded processor. > + > +FPGA connected to I2C: > +Required properties: > + > + - compatible: should be a board-specific string followed by a string > + indicating the type of FPGA. Example: > + "fsl,<board>-fpga", "fsl,fpga-qixis-i2c" > + - reg : i2c address of the qixis device. > + > +Example (LX2160A-QDS): > + /* The FPGA node */ > + fpga@66 { > + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c"; > + reg = <0x66>; > + #address-cells = <1>; > + #size-cells = <0>; > + } > + > +* Freescale on-board FPGA > + > +This is the memory-mapped registers for on board FPGA. > + > +Required properties: > +- compatible: should be a board-specific string followed by a string > + indicating the type of FPGA. Example: > + "fsl,<board>-fpga", "fsl,fpga-qixis" > +- reg: should contain the address and the length of the FPGA register set. > + > +Example (LS2080A-RDB): > + > + cpld@3,0 { > + compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis"; > + reg = <0x3 0 0x10000>; > + }; > + > -- > 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Leo Li <leoyang.li@nxp.com> To: Pankaj Bansal <pankaj.bansal@nxp.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: "open list : OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [PATCH v4 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage Date: Wed, 6 Feb 2019 22:26:39 +0000 [thread overview] Message-ID: <AM6PR04MB5863F3BE0D7C560F3DFECD618F6F0@AM6PR04MB5863.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20190205153924.7204-2-pankaj.bansal@nxp.com> > -----Original Message----- > From: Pankaj Bansal > Sent: Tuesday, February 5, 2019 4:15 AM > To: Leo Li <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Mark > Rutland <mark.rutland@arm.com> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > open list : OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS > <devicetree@vger.kernel.org>; Pankaj Bansal <pankaj.bansal@nxp.com> > Subject: [PATCH v4 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage > > an FPGA-based system controller, called “Qixis”, which > manages several critical system features, including: > • Reset sequencing > • Power supply configuration > • Board configuration > • hardware configuration > > The qixis registers are accessible over one or more system-specific > interfaces, typically I2C, JTAG or an embedded processor. In theory the on-board FPGA is not part of the SoC. The Qixis device has been defined previously in Documentation/devicetree/bindings/board/fsl-board.txt file. Although normally board bindings are defined in architecture specific binding folders, this is a good place for board related stuff used across multiple architectures. You can update the existing binding if needed. > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > --- > > Notes: > V4: > - No Change > V3: > - Added boardname based compatible field in bindings > - Added bindings for MMIO based FPGA > V2: > - No change > > .../bindings/soc/fsl/qixis_ctrl.txt | 53 ++++++++++++++++++ > 1 file changed, 53 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > new file mode 100644 > index 000000000000..5d510df14be8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt > @@ -0,0 +1,53 @@ > +* QIXIS FPGA block > + > +an FPGA-based system controller, called “Qixis”, which > +manages several critical system features, including: > +• Configuration switch monitoring > +• Power on/off sequencing > +• Reset sequencing > +• Power supply configuration > +• Board configuration > +• hardware configuration > +• Background power data collection (DCM) > +• Fault monitoring > +• RCW bypass SRAM (replace flash RCW with internal RCW) (NOR only) > +• Dedicated functional validation blocks (POSt/IRS, triggered event, and so > on) > +• I2C master for remote board control even with no DUT available > + > +The qixis registers are accessible over one or more system-specific > interfaces, > +typically I2C, JTAG or an embedded processor. > + > +FPGA connected to I2C: > +Required properties: > + > + - compatible: should be a board-specific string followed by a string > + indicating the type of FPGA. Example: > + "fsl,<board>-fpga", "fsl,fpga-qixis-i2c" > + - reg : i2c address of the qixis device. > + > +Example (LX2160A-QDS): > + /* The FPGA node */ > + fpga@66 { > + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c"; > + reg = <0x66>; > + #address-cells = <1>; > + #size-cells = <0>; > + } > + > +* Freescale on-board FPGA > + > +This is the memory-mapped registers for on board FPGA. > + > +Required properties: > +- compatible: should be a board-specific string followed by a string > + indicating the type of FPGA. Example: > + "fsl,<board>-fpga", "fsl,fpga-qixis" > +- reg: should contain the address and the length of the FPGA register set. > + > +Example (LS2080A-RDB): > + > + cpld@3,0 { > + compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis"; > + reg = <0x3 0 0x10000>; > + }; > + > -- > 2.17.1
next prev parent reply other threads:[~2019-02-06 22:26 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-02-05 10:14 [PATCH v4 0/2] add qixis driver Pankaj Bansal 2019-02-05 10:14 ` Pankaj Bansal 2019-02-05 10:14 ` [PATCH v4 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage Pankaj Bansal 2019-02-05 10:14 ` Pankaj Bansal 2019-02-06 22:26 ` Leo Li [this message] 2019-02-06 22:26 ` Leo Li 2019-02-13 21:23 ` Rob Herring 2019-02-13 21:23 ` Rob Herring 2019-02-05 10:14 ` [PATCH v4 2/2] drivers: soc: fsl: add qixis driver Pankaj Bansal 2019-02-05 10:14 ` Pankaj Bansal
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