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From: "Tian, Kevin" <kevin.tian@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Cooper, Andrew" <andrew.cooper3@citrix.com>,
	"Paul Durrant" <paul@xen.org>,
	"Pau Monné, Roger" <roger.pau@citrix.com>
Subject: RE: [PATCH v3 15/23] VT-d: allow use of superpage mappings
Date: Sun, 30 Jan 2022 03:26:06 +0000	[thread overview]
Message-ID: <BN9PR11MB5276705B0B47F078D25F891D8C249@BN9PR11MB5276.namprd11.prod.outlook.com> (raw)
In-Reply-To: <19531402-6392-c730-08a0-20e2a4ba71f4@suse.com>

> From: Jan Beulich
> Sent: Tuesday, January 11, 2022 12:32 AM
> 
> ... depending on feature availability (and absence of quirks).
> 
> Also make the page table dumping function aware of superpages.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Kevin Tian <kevin.tian@intel.com>

> ---
> v3: Rename queue_free_pt()'s last parameter. Replace "level > 1" checks
>     where possible. Tighten assertion.
> 
> --- a/xen/drivers/passthrough/vtd/iommu.c
> +++ b/xen/drivers/passthrough/vtd/iommu.c
> @@ -826,18 +826,37 @@ static int __must_check iommu_flush_iotl
>      return iommu_flush_iotlb(d, INVALID_DFN, 0, 0);
>  }
> 
> +static void queue_free_pt(struct domain *d, mfn_t mfn, unsigned int level)
> +{
> +    if ( level > 1 )
> +    {
> +        struct dma_pte *pt = map_domain_page(mfn);
> +        unsigned int i;
> +
> +        for ( i = 0; i < PTE_NUM; ++i )
> +            if ( dma_pte_present(pt[i]) && !dma_pte_superpage(pt[i]) )
> +                queue_free_pt(d, maddr_to_mfn(dma_pte_addr(pt[i])),
> +                              level - 1);
> +
> +        unmap_domain_page(pt);
> +    }
> +
> +    iommu_queue_free_pgtable(d, mfn_to_page(mfn));
> +}
> +
>  /* clear one page's page table */
>  static int dma_pte_clear_one(struct domain *domain, daddr_t addr,
>                               unsigned int order,
>                               unsigned int *flush_flags)
>  {
>      struct domain_iommu *hd = dom_iommu(domain);
> -    struct dma_pte *page = NULL, *pte = NULL;
> +    struct dma_pte *page = NULL, *pte = NULL, old;
>      u64 pg_maddr;
> +    unsigned int level = (order / LEVEL_STRIDE) + 1;
> 
>      spin_lock(&hd->arch.mapping_lock);
> -    /* get last level pte */
> -    pg_maddr = addr_to_dma_page_maddr(domain, addr, 1, flush_flags,
> false);
> +    /* get target level pte */
> +    pg_maddr = addr_to_dma_page_maddr(domain, addr, level, flush_flags,
> false);
>      if ( pg_maddr < PAGE_SIZE )
>      {
>          spin_unlock(&hd->arch.mapping_lock);
> @@ -845,7 +864,7 @@ static int dma_pte_clear_one(struct doma
>      }
> 
>      page = (struct dma_pte *)map_vtd_domain_page(pg_maddr);
> -    pte = page + address_level_offset(addr, 1);
> +    pte = &page[address_level_offset(addr, level)];
> 
>      if ( !dma_pte_present(*pte) )
>      {
> @@ -854,14 +873,20 @@ static int dma_pte_clear_one(struct doma
>          return 0;
>      }
> 
> +    old = *pte;
>      dma_clear_pte(*pte);
> -    *flush_flags |= IOMMU_FLUSHF_modified;
> 
>      spin_unlock(&hd->arch.mapping_lock);
>      iommu_sync_cache(pte, sizeof(struct dma_pte));
> 
>      unmap_vtd_domain_page(page);
> 
> +    *flush_flags |= IOMMU_FLUSHF_modified;
> +
> +    if ( order && !dma_pte_superpage(old) )
> +        queue_free_pt(domain, maddr_to_mfn(dma_pte_addr(old)),
> +                      order / LEVEL_STRIDE);
> +
>      return 0;
>  }
> 
> @@ -1952,6 +1977,7 @@ static int __must_check intel_iommu_map_
>      struct domain_iommu *hd = dom_iommu(d);
>      struct dma_pte *page, *pte, old, new = {};
>      u64 pg_maddr;
> +    unsigned int level = (IOMMUF_order(flags) / LEVEL_STRIDE) + 1;
>      int rc = 0;
> 
>      /* Do nothing if VT-d shares EPT page table */
> @@ -1976,7 +2002,7 @@ static int __must_check intel_iommu_map_
>          return 0;
>      }
> 
> -    pg_maddr = addr_to_dma_page_maddr(d, dfn_to_daddr(dfn), 1,
> flush_flags,
> +    pg_maddr = addr_to_dma_page_maddr(d, dfn_to_daddr(dfn), level,
> flush_flags,
>                                        true);
>      if ( pg_maddr < PAGE_SIZE )
>      {
> @@ -1985,13 +2011,15 @@ static int __must_check intel_iommu_map_
>      }
> 
>      page = (struct dma_pte *)map_vtd_domain_page(pg_maddr);
> -    pte = &page[dfn_x(dfn) & LEVEL_MASK];
> +    pte = &page[address_level_offset(dfn_to_daddr(dfn), level)];
>      old = *pte;
> 
>      dma_set_pte_addr(new, mfn_to_maddr(mfn));
>      dma_set_pte_prot(new,
>                       ((flags & IOMMUF_readable) ? DMA_PTE_READ  : 0) |
>                       ((flags & IOMMUF_writable) ? DMA_PTE_WRITE : 0));
> +    if ( IOMMUF_order(flags) )
> +        dma_set_pte_superpage(new);
> 
>      /* Set the SNP on leaf page table if Snoop Control available */
>      if ( iommu_snoop )
> @@ -2012,8 +2040,14 @@ static int __must_check intel_iommu_map_
> 
>      *flush_flags |= IOMMU_FLUSHF_added;
>      if ( dma_pte_present(old) )
> +    {
>          *flush_flags |= IOMMU_FLUSHF_modified;
> 
> +        if ( IOMMUF_order(flags) && !dma_pte_superpage(old) )
> +            queue_free_pt(d, maddr_to_mfn(dma_pte_addr(old)),
> +                          IOMMUF_order(flags) / LEVEL_STRIDE);
> +    }
> +
>      return rc;
>  }
> 
> @@ -2370,6 +2404,7 @@ static int __init vtd_setup(void)
>  {
>      struct acpi_drhd_unit *drhd;
>      struct vtd_iommu *iommu;
> +    unsigned int large_sizes = PAGE_SIZE_2M | PAGE_SIZE_1G;
>      int ret;
>      bool reg_inval_supported = true;
> 
> @@ -2412,6 +2447,11 @@ static int __init vtd_setup(void)
>                 cap_sps_2mb(iommu->cap) ? ", 2MB" : "",
>                 cap_sps_1gb(iommu->cap) ? ", 1GB" : "");
> 
> +        if ( !cap_sps_2mb(iommu->cap) )
> +            large_sizes &= ~PAGE_SIZE_2M;
> +        if ( !cap_sps_1gb(iommu->cap) )
> +            large_sizes &= ~PAGE_SIZE_1G;
> +
>  #ifndef iommu_snoop
>          if ( iommu_snoop && !ecap_snp_ctl(iommu->ecap) )
>              iommu_snoop = false;
> @@ -2483,6 +2523,9 @@ static int __init vtd_setup(void)
>      if ( ret )
>          goto error;
> 
> +    ASSERT(iommu_ops.page_sizes == PAGE_SIZE_4K);
> +    iommu_ops.page_sizes |= large_sizes;
> +
>      register_keyhandler('V', vtd_dump_iommu_info, "dump iommu info", 1);
> 
>      return 0;
> @@ -2797,7 +2840,7 @@ static void vtd_dump_page_table_level(pa
>              continue;
> 
>          address = gpa + offset_level_address(i, level);
> -        if ( next_level >= 1 )
> +        if ( next_level && !dma_pte_superpage(*pte) )
>              vtd_dump_page_table_level(dma_pte_addr(*pte), next_level,
>                                        address, indent + 1);
>          else
> 


  reply	other threads:[~2022-01-30  3:26 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-10 16:19 [PATCH v3 00/23] IOMMU: superpage support when not sharing pagetables Jan Beulich
2022-01-10 16:22 ` [PATCH v3 01/23] AMD/IOMMU: have callers specify the target level for page table walks Jan Beulich
2022-01-10 16:22 ` [PATCH v3 02/23] VT-d: " Jan Beulich
2022-01-30  3:17   ` Tian, Kevin
2022-01-31 10:04     ` Jan Beulich
2022-01-10 16:23 ` [PATCH v3 03/23] VT-d: limit page table population in domain_pgd_maddr() Jan Beulich
2022-01-30  3:22   ` Tian, Kevin
2022-01-10 16:25 ` [PATCH v3 04/23] IOMMU: have vendor code announce supported page sizes Jan Beulich
2022-01-10 16:25 ` [PATCH v3 05/23] IOMMU: simplify unmap-on-error in iommu_map() Jan Beulich
2022-01-10 16:27 ` [PATCH v3 06/23] IOMMU: add order parameter to ->{,un}map_page() hooks Jan Beulich
2022-01-10 16:27 ` [PATCH v3 07/23] IOMMU: have iommu_{,un}map() split requests into largest possible chunks Jan Beulich
2022-01-10 16:28 ` [PATCH v3 08/23] IOMMU/x86: restrict IO-APIC mappings for PV Dom0 Jan Beulich
2022-01-10 16:28 ` [PATCH v3 09/23] IOMMU/x86: perform PV Dom0 mappings in batches Jan Beulich
2022-01-10 16:29 ` [PATCH v3 10/23] IOMMU/x86: support freeing of pagetables Jan Beulich
2022-01-10 16:29 ` [PATCH v3 11/23] AMD/IOMMU: drop stray TLB flush Jan Beulich
2022-01-10 16:30 ` [PATCH v3 12/23] AMD/IOMMU: walk trees upon page fault Jan Beulich
2022-01-10 16:30 ` [PATCH v3 13/23] AMD/IOMMU: return old PTE from {set,clear}_iommu_pte_present() Jan Beulich
2022-01-10 16:31 ` [PATCH v3 14/23] AMD/IOMMU: allow use of superpage mappings Jan Beulich
2022-01-10 16:32 ` [PATCH v3 15/23] VT-d: " Jan Beulich
2022-01-30  3:26   ` Tian, Kevin [this message]
2022-01-10 16:33 ` [PATCH v3 16/23] IOMMU: fold flush-all hook into "flush one" Jan Beulich
2022-01-30  3:38   ` Tian, Kevin
2022-01-10 16:34 ` [PATCH v3 17/23] IOMMU/x86: prefill newly allocate page tables Jan Beulich
2022-02-18  5:01   ` Tian, Kevin
2022-02-18  8:24     ` Jan Beulich
2022-02-18  8:26       ` Tian, Kevin
2022-01-10 16:35 ` [PATCH v3 18/23] x86: introduce helper for recording degree of contiguity in " Jan Beulich
2022-01-10 16:35 ` [PATCH v3 19/23] AMD/IOMMU: free all-empty " Jan Beulich
2022-01-10 16:36 ` [PATCH v3 20/23] VT-d: " Jan Beulich
2022-02-18  5:20   ` Tian, Kevin
2022-02-18  8:31     ` Jan Beulich
2022-03-14  4:01       ` Tian, Kevin
2022-03-14  7:33         ` Jan Beulich
2022-03-17  5:55           ` Tian, Kevin
2022-03-17  8:55             ` Jan Beulich
2022-01-10 16:37 ` [PATCH v3 21/23] AMD/IOMMU: replace all-contiguous page tables by superpage mappings Jan Beulich
2022-01-10 16:38 ` [PATCH v3 22/23] VT-d: " Jan Beulich
2022-02-18  5:22   ` Tian, Kevin
2022-01-10 16:38 ` [PATCH v3 23/23] IOMMU/x86: add perf counters for page table splitting / coalescing Jan Beulich
2022-02-18  5:23   ` Tian, Kevin

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